Starting The Flash Memory Automatic Algorithm - Fujitsu F2MC-8FX Hardware Manual

CHAPTER 28 256-KBIT FLASH MEMORY
28.4

Starting the Flash Memory Automatic Algorithm

There are three types of commands that invoke the flash memory automatic algorithm:
read/reset, write (program), and chip-erase.
Command Sequence Table
Table 28.4-1 lists the commands used in programming/erasing flash memory.
Table 28.4-1 :Command Sequence
1st bus write cycle 2nd bus write cycle 3rd bus write cycle 4th bus write cycle 5th bus write cycle 6th bus write cycle
Command Bus write
sequence cycle
Address
F
1
X
Read/reset*
UAAA
4
UAAA
Write 4
Chip erase XAAA
6
• RA : Read address
• PA : Write (program) address
• RD : Read data
• PD : Write (program) data
• U : Upper 4 bits same as RA, PA, and SA
• F : FF/FE
X
• X : Arbitrary address
*: Both of the two types of read/reset command can reset the flash memory to read mode.
Notes:
• Addresses in the table are the values in the CPU memory map. All addresses and data are
hexadecimal values. However, "X" is an arbitrary value.
• Address "U" in the table is not arbitrary, whose four bits (bits 15 to 12) must have the same value
as RA and PA.
Example: If RA = C48EH, U = C; If PA = 1024H, U=1
526
Data Address Data
XX F0
-
H H
AA U554 55
H H H
AA U554 55
H H H
AA X554 55
H H H
Address Data Address
- - -
UAAA F0
RA
H H H
UAAA A0
PA
H H H
XAAA 80 XAAA
H H H
Data Address Data
- - -
RD -
PD -
AA X554 55
H H H
Address Data
- - -
- - -
- - -
XAAA 10
H H H