Table B.2C Effective Address Fields - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

Code
00 R0
01 R1
02 R2
03 R3
04 R4
05 R5
06 R6
07 R7
08
09
0A
0B
0C
0D
0E
0F
10 @RW0+disp8
11 @RW1+disp8
12 @RW2+disp8
13 @RW3+disp8
14 @RW4+disp8
15 @RW5+disp8
16 @RW6+disp8
17 @RW7+disp8
18 @RW0+disp16
19 @RW1+disp16
1A @RW2+disp16
1B @RW3+disp16
1C @RW0+RW7
1D @RW1+RW7
1E @PC+disp16
1F
Note: The number of bytes for address extension is indicated by the "+" symbol in the "#" (number of
bytes) column in the Table of Instructions and by the number of bytes in the detailed instruction
rules.
MB90580 Series

Table B.2c Effective Address Fields

Notation
RW0 RL0
RW1 (RL0)
RW2 RL1
Register direct
RW3 (RL1)
"ea" corresponds to byte, word, and long-
RW4 RL2
word types, starting from the left
RW5 (RL2)
RW6 RL3
RW7 (RL3)
@RW0
@RW1
Register indirect
@RW2
@RW3
@RW0+
@RW1+
Register indirect with post-incrementing
@RW2+
@RW3+
Register indirect with 8-bit displacement
Register indirect with 16-bit displacement
Register indirect with index
Register indirect with index
PC indirect with 16-bit displacement
addr16 Direct address
Address format
B.2 Instruction Set
Number of bytes in
address extension
[Note]
–
0
0
1
2
0
0
2
2
APPENDIX B: Instructions 317