Fujitsu F2MC-16LX MB90580 Series Hardware Manual page 115

I/O register address pointer (IOA)
This is a 16-bit register that indicates the low-order address (A15 to A0) of the buffer and I/O register used
for data transfer to and from the buffer. The high-order address (A23 to A16) are all zeroes, and any I/O
between addresses 000000
Upper address pointer
Initial value
Lower address pointer
Initial value
2
OS status register (ISCS)
EI
This eight-bit register indicates the update direction (increment/decrement), transfer data format
(byte/word), and transfer direction of the buffer address pointer and the I/O register address pointer. This
register also indicates whether the buffer address pointer or I/O register address pointer is updated or
fixed.
Read/write
Initial value
* Always write 0 to bits 7 to 5 of ISCS.
Each bit is described below.
[bit 4] IF : Specify whether the I/O register address pointer is updated or fixed.
The I/O register address pointer is updated after data transfer.
0
The I/O register address pointer is not updated after data transfer
1
Note: Only increment is allowed.
[bit 3] BW: Specify the transfer data length.
Byte
0
Word
1
[bit 2] BF: Specify whether the buffer address pointer is updated or fixed.
The buffer address pointer is updated after data transfer.
0
The buffer address pointer is not updated after data transfer.
1
Note: Only the low-order 16 bits of the buffer address are updated. Only increment is
allowed.
MB90580 Series
and 00FFFF can be specified.
H H
15 14 13
A15 A14 A13
(X) (X) (X)
7 6 5
A07 A06 A05
(X) (X) (X)
7 6 5
— — —
(R/W) (R/W) (R/W)
(X) (X) (X)
7.6 Extended intelligent I/O service (EI2OS)
12 11 10
A12 A11 A10
(X) (X) (X)
4 3 2
A04 A03 A02
(X) (X) (X)
4 3 2
IF BW BF
(R/W) (R/W) (R/W) (R/W)
(X) (X) (X)
9 8
Bit number
A09 A08
IOAH
(X) (X)
1 0
Bit number
A01 A00
IOAL
(X) (X)
1 0
Bit number
DIR SE
(R/W)
(X) (X)
.
Chapter 7: Interrupt 95