Precautions - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

18.5 Precautions

(1) Changing Register Values
Changing the values of the following PWCSR bits when the timer is operating is prohibited. Only change
bit values before starting the timer or after operation stops.
[bits 7, 6] CKS1, CKS0: Clock selection bits
[bits 5, 4] PIS1, PIS0: Count input pin selection bits
[bit 3] S/C: Count mode (single-shot or continuous) selection bit
[bits 2, 1, 0] MOD2, MOD1, MOD0: Operating mode and count edge selection bits
Note that the value of the pulse output level indication bit (POUT: bit 8) does not change if the bit is written
to when the timer is operating.
Changing the DIVR value when the timer is operating is prohibited. Only change the DIVR value before
starting the timer or after operation stops.
(2) Count End Flag in Timer Mode
The value of the count end interrupt request flag (EDIR) in PWCSR has no meaning in timer mode.
Therefore, always set the enable bit for the count end interrupt request (EDIE) in PWCSR to "0".
(3) STRT and STOP bits in PWCSR
Note that the meaning of these two bits differs depending on whether they are being read or written (see
the register description for details).
Also note that read-modify-write instructions always read the bits as "11
Therefore, bit manipulation instructions cannot be used to read the operation state (as the result will
always indicate "operating").
However, bit manipulation instructions (such as the bit clear instruction) can be used to write to the STRT
or STOP bit to start or stop the timer.
(4) Clearing the Timer
In pulse width count mode, the timer is cleared by the count start edge and therefore the previous data in
the timer has no meaning.
(5) Clock Selection Bits
Setting "11 " to the clock selection bits (CKS1, CKS0: bits 7, 6) in PWCSR is prohibited.
B
(6) PWCR and Timer Value When Changing Mode
The value in PWCR and the timer value are indeterminate if the timer is set to single-shot mode after forc-
ibly halting operation in reload mode. Therefore, always set a value before using the timer.
The value in PWCR is indeterminate if the timer is set to reload mode after forcibly halting operation in sin-
gle-shot mode. Therefore, always set a value before using the timer.
When changing from pulse width count mode to timer mode, always set a value to PWCR before starting
the timer.
(7) Minimum Input Pulse Width
The following restriction applies to pulses input to the pulse width count input pins.
• Minimum input pulse width: Machine cycle divided by 2 (
• Maximum input frequency: Machine cycle divided by 4 (
The operation of the timer if pulses of shorter width or higher frequency are input is not guaranteed. If it is
possible that such noise may be present on the input signal, use an external filter or similar circuit to
suppress the noise.
MB90580 Series
" regardless of the actual values.
B
≥
0.125µs for a 16MHz machine cycle)
≥
4MHz for a 16MHz machine cycle)
Chapter 18: Pulse Width Counter (PWC) Timer
18.5 Precautions
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