F 2 Mc-16Lx Instruction Set (351 Instructions); Table B.2.1A Transfer Instructions (Byte) (41 Instructions) - Fujitsu F2MC-16LX MB90580 Series Hardware Manual
16-bit microcontrollers
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Also See for F2MC-16LX MB90580 Series:
- Hardware manual (706 pages) ,
- Application note (13 pages) ,
- Operation manual (10 pages)
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B.2 Instruction Set
B.2.1 F
MC-16LX Instruction Set (351 Instructions)
2
Mnemonic
MOV
A,dir
MOV
A,addr16
MOV
A,Ri
MOV
A,ear
MOV
A,eam
MOV
A,io
MOV
A,#imm8
MOV
A,@A
MOV
A,@RLi+disp8
MOVN A,#imm4
MOVX A,dir
MOVX A,addr16
MOVX A,Ri
MOVX A,ear
MOVX A,eam
MOVX A,io
MOVX A,#imm8
MOVX A,@A
MOVX A,@RWi+disp8
MOVX A,@RLi+disp8
MOV
dir,A
MOV
addr16,A
MOV
Ri,A
MOV
ear,A
MOV
eam,A
MOV
io,A
MOV
@RLi+disp8,A
MOV
Ri,ear
MOV
Ri,eam
MOV
ear,Ri
MOV
eam,Ri
MOV
Ri,#imm8
MOV
io,#imm8
MOV
dir,#imm8
MOV
ear,#imm8
MOV
eam,#imm8
MOV
@AL,AH / MOV @A,T
XCH
A,ear
XCH
A,eam
XCH
Ri,ear
XCH
Ri,eam
Note: For an explanation of "(a)" to "(d)" in the colunm "B", see Table B.2d and Table B.2e.
320
APPENDIX B: Instructions
Table B.2.1a Transfer Instructions (Byte) (41 Instructions)
#
RG
B
~
byte (A) ← (dir)
2
3
0
(b)
byte (A) ← (addr16)
3
4
0
(b)
byte (A) ← (Ri)
1
2
1
0
byte (A) ← (ear)
2
2
1
0
byte (A) ← (eam)
2+
3+(a)
0
(b)
byte (A) ← (io)
2
3
0
(b)
byte (A) ← (imm8)
2
2
0
0
byte (A) ← ((A))
2
3
0
(b)
byte (A) ← ((RLi)+disp8)
3
10
2
(b)
byte (A) ← imm4
1
1
0
0
byte (A) ← (dir)
2
3
0
(b)
byte (A) ← (addr16)
3
4
0
(b)
byte (A) ← (Ri)
2
2
1
0
byte (A) ← (ear)
2
2
1
0
byte (A) ← (eam)
2+
3+(a)
0
(b)
byte (A) ← (io)
2
3
0
(b)
byte (A) ← (imm8)
2
2
0
0
byte (A) ← ((A))
2
3
0
(b)
byte (A) ← ((RWi)+disp8)
2
5
1
(b)
byte (A) ← ((RLi)+disp8)
3
10
2
(b)
byte (dir) ← (A)
2
3
0
(b)
byte (addr16) ← (A)
3
4
0
(b)
byte (Ri) ← (A)
1
2
1
0
byte (ear) ← (A)
2
2
1
0
byte (eam) ← (A)
2+
3+(a)
0
(b)
byte (io) ← (A)
2
3
0
(b)
byte ((RLi)+disp8) ← (A)
3
10
2
(b)
byte (Ri) ← (ear)
2
3
2
0
byte (Ri) ← (eam)
2+
4+(a)
1
(b)
byte (ear) ← (Ri)
2
4
2
0
byte (eam) ← (Ri)
2+
5+(a)
1
(b)
byte (Ri) ← imm8
2
2
1
0
byte (io) ← imm8
3
5
0
(b)
byte (dir) ← imm8
3
5
0
(b)
byte (ear) ← imm8
3
2
1
0
byte (eam) ← imm8
3+
4+(a)
0
(b)
byte ((A)) ← (AH)
2
3
0
(b)
byte (A) ←→ (ear)
2
4
2
0
byte (A) ←→ (eam)
2+
5+(a)
0
2×(b)
byte (Ri) ←→ (ear)
2
7
4
0
byte (Ri) ←→ (eam)
2+
9+(a)
2
2×(b)
Operation
LH
AH
∗
Z
∗
Z
∗
Z
∗
Z
∗
Z
∗
Z
∗
Z
Z
-
∗
Z
∗
Z
∗
X
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X
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X
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X
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Z
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I
S
T
N
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V
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R
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MB90580 Series
C
RMW
-
-
-
-
-
-
-
-
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