Fujitsu MB90420/5 (A) Series Manuals

Manuals and User Guides for Fujitsu MB90420/5 (A) Series. We have 1 Fujitsu MB90420/5 (A) Series manual available for free PDF download: Hardware Manual

Fujitsu MB90420/5 (A) Series Hardware Manual (551 pages)

F2MC-16LX FAMILY 16-BIT MICROCONTROLLERS

Brand: Fujitsu | Category: Microcontrollers | Size: 4.74 MB

Table of Contents
4
Chapter 1 General

25
- Overview of Product
  25
- Table 1-1 Overview of MB90420/5 (A) Series
  25
- Features
  26
- Table 1-2 Features of MB90420/5 (A) Series
  26
- Block Diagram
  28
- Fig. 1.1 Block Diagram
  28
  - Package Dimension
    29
- Fig. 1.3 Package Dimension (LQFP100)
  30
  - Pin Assignment
    31
- Fig. 1.4 Pin Assignment (QFP100)
  31
- Fig. 1.5 Pin Assignment (LQFP100)
  32
  - Pin Description
    33
  - Table 1-3 Pin Description
    33
  - I/O Circuits
    36
  - Table 1-4 I/O Circuits
    36
  - Notes on Handling Devices
    38
- Fig. 1.6 Example of Using External Clock
  39
- Fig. 1.7 Power Input Pins
  39
- CC /Vss )
  39
- Fig. 1.8 Undefined-Value Output Timing Chart
  40
Chapter 2 CPU

41
Chapter 3 Reset

77
Chapter 4 Clock

89
Chapter 5 Low-Power Consumption Mode

103
Chapter 6 Interrupt

127
Chapter 7 Mode Setting

165
Chapter 8 I/O Port

171
- Overview of I/O Port
  173
- Table 8-1 List of each Port Functions
  174
- Registers and Assignment of Pins Serving as External Pins
  175
- Table 8-2 Registers for each Port
  175
- Port 0
  176
- Fig. 8.1 Block Diagram of Pins of Port 0
  177
  - Registers for Port 0 (PDR0, DDR0)
    178
  - Operation of Port 0
    179
  - Table 8-6 State of Port 0 Pins
    180
  - Port 1
    181
  - Table 8-7 Pins of Port 1
    181
- Fig. 8.2 Block Diagram of Pins of Port 1
  182
  - Registers for Port 1 (PDR1, DDR1)
    183
  - Operation of Port 1
    184
  - Table 8-10 State of Port 1 Pins
    185
  - Port 3
    186
  - Table 8-11 Pins of Port 3
    186
- Fig. 8.3 Block Diagram of Pins of Port 3
  187
  - Registers for Port 3 (PDR3, DDR3)
    188
  - Operation of Port 3
    189
  - Table 8-14 State of Port 3 Pins
    190
  - Port 4
    191
  - Table 8-15 Pins of Port 4
    191
- Fig. 8.4 Block Diagram of Pins of Port 4
  192
  - Registers for Port 4 (PDR4, DDR4)
    193
  - Operation of Port 4
    194
  - Table 8-18 State of Port 4 Pins
    195
  - Port 5
    196
  - Table 8-19 Pins of Port 5
    196
- Fig. 8.5 Block Diagram of Pins of Port 5
  197
  - Registers for Port 5 (PDR5, DDR5)
    198
  - Operation of Port 5
    199
  - Table 8-22 State of Port 5 Pins
    200
  - Port 6
    201
  - Table 8-23 Pins of Port 6
    201
- Fig. 8.6 Block Diagram of Pins of Port 6
  202
  - Registers for Port 6 (PDR6, DDR6)
    203
  - Operation of Port 6
    204
  - Table 8-26 State of Port 6 Pins
    205
  - Port 7
    206
- Fig. 8.7 Block Diagram of Pins of Port 7
  207
  - Registers for Port 7 (PDR7, DDR7)
    208
  - Operation of Port 7
    209
  - Table 8-30 State of Port 7 Pins
    210
  - Port 8
    211
- Fig. 8.8 Block Diagram of Pins of Port 8
  212
  - Registers for Port 8 (PDR8, DDR8)
    213
  - Operation of Port 8
    214
  - Table 8-34 State of Port 8 Pins
    215
  - Port 9
    216
  - Table 8-35 Pins of Port 9
    216
- Fig. 8.9 Block Diagram of Pins of Port 9
  217
  - Registers for Port 9 (PDR9, DDR9)
    218
  - Operation of Port 9
    219
  - Table 8-38 State of Port 9 Pins
    220
  - Program Example Using I/O Ports
    221
- Fig. 8.10 Eight-Segment LED Connection Example
  221
Chapter 9 Watchdog Timer/Time-Base Timer/Watch Timer (Sub-Clock)

225
Chapter 10 16-Bit Reload Timer

243
Chapter 11 Input Capture

271
Chapter 12 UART

285
Chapter 13 PPG Timer

325
Chapter 14 LCD Controller/Driver

337
Chapter 15 Stepping Motor Controller

366
Chapter 16 Dtp/External Interrupt Circuit

376
Chapter 17 Delayed Interrupt Generate Module

396
Chapter 18 Timepiece Timer

400
- Overview of Timepiece Timer
  402
- Fig. 18.1 Block Diagram of Timepiece Timer
  402
  - Timepiece Timer Registers
    403
    
    Timepiece Timer Control Register
    405
    
    Sub-Second Data Register
    406
    
    Second/Minute/Hour Data Register
    407
Chapter 19 8-/10- Bit A/D Converter

408
Chapter 20 Sound Generator

436
- Overview of Sound Generator
  438
- Fig. 20.1 Block Diagram of Sound Generator
  438
  - Sound Generator Registers
    439
    
    Sound Control Register
    440
    
    Frequency Data Register
    442
- Fig. 20.2 Relationship between Tone Signal and Register Value
  442
  - Amplitude Data Register
    443
- Fig. 20.3 Relationship between Register Value and PWM Pulse
  443
  - Decrement Grade Register
    444
  - Tone Count Register
    444
Chapter 21 ROM Correction

446
Chapter 22 ROM Mirror Function Select Module

456
- Overview of ROM Mirror Function Select Module
  458
- Fig. 22.1 Block Diagram of ROM Mirror Function Select Module
  458
  - ROM Mirror Function Select Register (ROMM)
    459
Chapter 23 Can Controller

460
Chapter 24 Low Voltage and CPU Operation Detection Reset Circuit

504
Chapter 25 1-Mbit Flash Memory

514
Chapter 26 Examples of MB90F428/A Serial Write Connection

542

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Fujitsu MB90420/5 (A) Series Manuals

Fujitsu MB90420/5 (A) Series Hardware Manual (551 pages)

Table of Contents

Chapter 1 General

Chapter 2 CPU

Chapter 3 Reset

Chapter 4 Clock

Chapter 5 Low-Power Consumption Mode

Chapter 6 Interrupt

Chapter 7 Mode Setting

Chapter 8 I/O Port

Chapter 9 Watchdog Timer/Time-Base Timer/Watch Timer (Sub-Clock)

Chapter 10 16-Bit Reload Timer

Chapter 11 Input Capture

Chapter 12 UART

Chapter 13 PPG Timer

Chapter 14 LCD Controller/Driver

Chapter 15 Stepping Motor Controller

Chapter 16 Dtp/External Interrupt Circuit

Chapter 17 Delayed Interrupt Generate Module

Chapter 18 Timepiece Timer

Chapter 19 8-/10- Bit A/D Converter

Chapter 20 Sound Generator

Chapter 21 ROM Correction

Chapter 22 ROM Mirror Function Select Module

Chapter 23 Can Controller

Chapter 24 Low Voltage and CPU Operation Detection Reset Circuit

Chapter 25 1-Mbit Flash Memory

Chapter 26 Examples of MB90F428/A Serial Write Connection

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