Gb/S Qsfp+ Module Connectors - Xilinx VCU1525 User Manual

The XCVU9P-L2FSGD2104E FPGA (-2 speed grade) included with the VCU1525 board
supports up to Gen3 x16 and Gen4 x8.
The PCIe PEX_REFCLK_P/N pair is input from the CN1 edge connector and AC-coupled
directly to FPGA U1 Quad 226 MGTREFCLK0 pins AM11 (P) and AM10 (N) (also see
Figure 3-11).

28 Gb/s QSFP+ Module Connectors

[Figure 2-1, callout 13, 14]
The VCU1525 board hosts dual quad (4-channel) small form-factor pluggable (28 Gb/s
QSFP+) connectors (QSFP0 J7, QSFP1 J9) that accept 28 Gb/s and below QSFP+ optical
modules. Each connector is housed within a single 28 Gb/s QSFP+ cage assembly. QSFP0 J7
RX/TX lanes are wired to GTY bank/quad 231, and QSFP1 J9 RX/TX lanes are wired to GTY
bank/quad 230.
Figure 3-11 shows 28 Gb/s QSFP+ module connector circuitry typical to each connector.
The FPGA connections for each quad and for the QSFP control nets are listed in
Master Constraints File
VCU1525 Acceleration Platform User Guide
UG1268 (v1.0) November 13, 2017
Listing.
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Chapter 3: Board Component Descriptions
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Appendix A,
32