Default Switch Settings; Installing The Vcu1525 Board In A Server Chassis; Fpga Configuration - Xilinx VCU1525 User Manual

Table 2-1: VCU1525 Board Component Descriptions (Cont'd)
Number Ref Des
15 U19 Board Management Controller
(BMC)
16 JP1 Auxiliary 12V power connector
(Vccint Regulator
17 J4 Cooling Fan Connector

Default Switch Settings

Default switch settings are listed in
Table 2-2: Default Switch Settings
Switch Function
(1)
SW3 4-pole GPIO DIP
Notes:
1. On revision D and later boards, this switch is not populated.
Table 2-3 shows other visible switch locations.
Table 2-3: Other Visible Switches
Component
SW1
SW2

Installing the VCU1525 Board in a Server Chassis

Follow the server manufacturer's instructions for add-in board installation.

FPGA Configuration

The VCU1525 board supports two UltraScale+ FPGA configuration modes:
• Quad SPI flash memory
• JTAG using USB JTAG configuration port (USB J13/FT4232H U27)
The FPGA bank 0 mode pins are hardwired to M[2:0] = 001 Master SPI mode with
pull-up/down resistors.
VCU1525 Acceleration Platform User Guide
UG1268 (v1.0) November 13, 2017
Feature
(Link)
Circuit)
Table
Default
ON, ON, ON, ON
Function Comments
Pushbutton switch CPU_RESET_B
Pushbutton switch PROGRAM_B
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Chapter 2: Board Setup and Configuration
Notes
TI MSP432P401RIPZ
LIGHT JIE AARRA001-08MTTRH
JST SALES S4B-PH-K-S(LF)(SN)
2-2. Switch locations are shown in
Comments Figure 2-1
4-pole user DIP
Figure 2-1 Callout
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Schematic
Page
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Figure 2-1.
Callout Schematic Page
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Schematic Page
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