Host Interface (Hi08); Host Port Usage Considerations - Motorola DSP56303 User Manual

Host Interface (HI08)

Signal Name Type
MODC/IRQC Input
MODD/IRQD Input
2.7 Host Interface (HI08)
The HI08 provides a fast, parallel data-to-8-bit port that can directly connect to the host bus.
The HI08 supports a variety of standard buses and can directly connect to a number of
industry-standard microcomputers, microprocessors, DSPs, and DMA hardware.
2.7.1

Host Port Usage Considerations

Careful synchronization is required when the system reads multiple-bit registers that are
written by another asynchronous system. This is a common problem when two asynchronous
systems are connected (as they are in the Host port). The considerations for proper operation
are discussed in Table 2-10.
Action
Asynchronous read of receive
byte registers
2-10
Table 2-9. Interrupt and Mode Control (Continued)
State During
Reset
Input Mode Select C/External Interrupt Request C—Selects the initial chip
operating mode during hardware reset and becomes a level-sensitive
or negative-edge-triggered, maskable interrupt request input during
normal instruction processing. MODA, MODB, MODC, and MODD
select one of sixteen initial chip operating modes, latched into OMR
when the RESET signal is deasserted.
Internally synchronized to CLKOUT. If IRQC is asserted synchronous
to CLKOUT, multiple processors can be re-synchronized using the
WAIT instruction and asserting IRQC to exit the Wait state.
MODC/IRQC can tolerate 5 V.
Input Mode Select D/External Interrupt Request D—Selects the initial chip
operating mode during hardware reset and becomes a level-sensitive
or negative-edge-triggered, maskable interrupt request input during
normal instruction processing. MODA, MODB, MODC, and MODD
select one of sixteen initial chip operating modes, latched into OMR
when the RESET signal is deasserted.
Internally synchronized to CLKOUT. If IRQD is asserted synchronous
to CLKOUT, multiple processors can be re-synchronized using the
WAIT instruction and asserting IRQD to exit the Wait state.
MODD/IRQD can tolerate 5 V.
Table 2-10. Host Port Usage Considerations
When reading the receive byte registers, Receive register High (RXH), Receive register
Middle (RXM), or Receive register Low (RXL), the host interface programmer should use
interrupts or poll the Receive Register Data Full (RXDF) flag that indicates data is
available. This assures that the data in the receive byte registers is valid.
DSP56303 User's Manual
Signal Description
Description