Philips LPC213 Series User Manual page 82

Philips Semiconductors
Volume 1
Table 70:
Bit
31:0
Table 71:
Bit
31:0
8.5 GPIO usage notes
8.5.1 Example 1: sequential accesses to IOSET and IOCLR affecting the
same GPIO pin/bit
State of the output configured GPIO pin is determined by writes into the pin's port IOSET
and IOCLR registers. Last of these accesses to the IOSET/IOCLR register will determine
the final output of a pin.
In case of a code:
IO0DIR = 0x0000 0080 ;pin P0.7 configured as output
IO0CLR = 0x0000 0080 ;P0.7 goes LOW
IO0SET = 0x0000 0080 ;P0.7 goes HIGH
IO0CLR = 0x0000 0080 ;P0.7 goes LOW
pin P0.7 is configured as an output (write to IO0DIR register). After this, P0.7 output is set
to low (first write to IO0CLR register). Short high pulse follows on P0.7 (write access to
IO0SET), and the final write to IO0CLR register sets pin P0.7 back to low level.
8.5.2 Example 2: immediate output of 0s and 1s on a GPIO port
Write access to port's IOSET followed by write to the IOCLR register results with pins
outputting 0s being slightly later then pins outputting 1s. There are systems that can
tolerate this delay of a valid output, but for some applications simultaneous output of a
binary content (mixed 0s and 1s) within a group of pins on a single GPIO port is required.
This can be accomplished by writing to the port's IOPIN register.
Following code will preserve existing output on PORT0 pins P0.[31:16] and P0.[7:0] and at
the same time set P0.[15:8] to 0xA5, regardless of the previous value of pins P0.[15:8]:
IO0PIN = (IO0PIN && #0xFFFF00FF) || #0x0000A500
User manual
GPIO Direction Register 0 (IO0DIR - address 0xE002 8008) bit description
Symbol Value Description
P0xDIR Direction control bits. Bit 0 in IO0DIR controls P0.0 ...
Bit 30 in IO0DIR controls P0.30.
0 Controlled pin is input.
1 Controlled pin is output.
GPIO Direction Register 1 (IO1DIR - address 0xE002 8018) bit description
Symbol Value Description
P1xDIR Direction control bits. Bit 0 in IO1DIR controls P1.0 ...
Bit 30 in IO1DIR controls P1.30.
0 Controlled pin is input.
1 Controlled pin is output.
Rev. 01 — 24 June 2005
UM10120
Chapter 8: GPIO
Reset value
0x0000 0000
Reset value
0x0000 0000
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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