Philips LPC213 Series User Manual page 197

Philips Semiconductors
Volume 1
Table 165: A/D Global Start Register (ADGSR - address 0xE003 4008) bit description
Bit Symbol Value Description
26:24 START
000
001
010
011
100
101
110
111
27 EDGE
1
0
31:28 -
16.5 Operation
16.5.1 Hardware-triggered conversion
If the BURST bit in the ADCR is 0 and the START field contains 010-111, the A/D
converter will start a conversion when a transition occurs on a selected pin or Timer Match
signal. The choices include conversion on a specified edge of any of 4 Match signals, or
conversion on a specified edge of either of 2 Capture/Match pins. The pin state from the
selected pad or the selected Match signal, XORed with ADCR bit 27, is used in the edge
detection logic.
16.5.2 Interrupts
An interrupt request is asserted to the Vectored Interrupt Controller (VIC) when the DONE
bit is 1. Software can use the Interrupt Enable bit for the A/D Converter in the VIC to
control whether this assertion results in an interrupt. DONE is negated when the ADDR is
read.
16.5.3 Accuracy vs. digital receiver
The AIN function must be selected in corresponding Pin Select register (see "Pin Connect
Block" on page 73) in order to get accurate voltage readings on the monitored pin. For pin
hosting an ADC input, it is not possible to have a have a digital function selected and yet
get valid ADC readings. An inside circuit disconnects ADC hardware from the associated
pin whenever a digital function is selected on that pin.
User manual
When the BURST bit is 0, these bits control whether and when an A/D conversion is
started:
No start (this value should be used when clearing PDN to 0).
Start conversion now.
Start conversion when the edge selected by bit 27 occurs on
P0.16/EINT0/MAT0.2/CAP0.2 pin.
Start conversion when the edge selected by bit 27 occurs on
P0.22/TD3/CAP0.0/MAT0.0 pin.
Start conversion when the edge selected by bit 27 occurs on MAT0.1.
Start conversion when the edge selected by bit 27 occurs on MAT0.3.
Start conversion when the edge selected by bit 27 occurs on MAT1.0.
Start conversion when the edge selected by bit 27 occurs on MAT1.1.
This bit is significant only when the START field contains 010-111. In these cases:
Start conversion on a falling edge on the selected CAP/MAT signal.
Start conversion on a rising edge on the selected CAP/MAT signal.
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
Rev. 01 — 24 June 2005
UM10120
Chapter 16: A/D Converter
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Reset
value
0
0
NA
197