Philips LPC213 Series User Manual page 49

Philips Semiconductors
Volume 1
Table 33: VIC register map
Name Description
VICIRQStatus IRQ Status Register. This register reads out the state of
those interrupt requests that are enabled and classified as
IRQ.
VICFIQStatus FIQ Status Requests. This register reads out the state of
those interrupt requests that are enabled and classified as
FIQ.
VICRawIntr Raw Interrupt Status Register. This register reads out the
state of the 32 interrupt requests / software interrupts,
regardless of enabling or classification.
VICIntSelect Interrupt Select Register. This register classifies each of the
32 interrupt requests as contributing to FIQ or IRQ.
VICIntEnable Interrupt Enable Register. This register controls which of the
32 interrupt requests and software interrupts are enabled to
contribute to FIQ or IRQ.
VICIntEnClr Interrupt Enable Clear Register. This register allows
software to clear one or more bits in the Interrupt Enable
register.
VICSoftInt Software Interrupt Register. The contents of this register are
ORed with the 32 interrupt requests from various peripheral
functions.
VICSoftIntClear Software Interrupt Clear Register. This register allows
software to clear one or more bits in the Software Interrupt
register.
VICProtection Protection enable register. This register allows limiting
access to the VIC registers by software running in privileged
mode.
VICVectAddr Vector Address Register. When an IRQ interrupt occurs, the
IRQ service routine can read this register and jump to the
value read.
VICDefVectAddr Default Vector Address Register. This register holds the
address of the Interrupt Service routine (ISR) for
non-vectored IRQs.
VICVectAddr0 Vector address 0 register. Vector Address Registers 0-15
hold the addresses of the Interrupt Service routines (ISRs)
for the 16 vectored IRQ slots.
VICVectAddr1 Vector address 1 register.
VICVectAddr2 Vector address 2 register.
VICVectAddr3 Vector address 3 register.
VICVectAddr4 Vector address 4 register.
VICVectAddr5 Vector address 5 register.
VICVectAddr6 Vector address 6 register.
VICVectAddr7 Vector address 7 register.
VICVectAddr8 Vector address 8 register.
VICVectAddr9 Vector address 9 register.
VICVectAddr10 Vector address 10 register.
VICVectAddr11 Vector address 11 register.
User manual Rev. 01 — 24 June 2005
UM10120
Access Reset Address
[1]
value
RO 0 0xFFFF F000
RO 0 0xFFFF F004
RO 0 0xFFFF F008
R/W 0 0xFFFF F00C
R/W 0 0xFFFF F010
WO 0 0xFFFF F014
R/W 0 0xFFFF F018
WO 0 0xFFFF F01C
R/W 0 0xFFFF F020
R/W 0 0xFFFF F030
R/W 0 0xFFFF F034
R/W 0 0xFFFF F100
R/W 0 0xFFFF F104
R/W 0 0xFFFF F108
R/W 0 0xFFFF F10C
R/W 0 0xFFFF F110
R/W 0 0xFFFF F114
R/W 0 0xFFFF F118
R/W 0 0xFFFF F11C
R/W 0 0xFFFF F120
R/W 0 0xFFFF F124
R/W 0 0xFFFF F128
R/W 0 0xFFFF F12C
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Chapter 5: VIC
49