Motorola Digital DNA MSC8101 Technical Data Manual page 39

Name
General- Peripheral Controller:
Purpose Dedicated I/O
I/O Protocol
PC25 BRG7O
CLK7
TIN4
DMA: DACK2
PC24 BRG8O
CLK8
TIN3
Timer4: TOUT4
DMA: DREQ2
Communications Processor Module (CPM) Ports
Table 1-5. Port C Signals (Continued)
Dedicated
I/O Data
Direction
Output Baud-Rate Generator 7 Output
The CPM supports up to 8 BRGs. The BRGs can be used
internally by the bank-of-clocks selection logic and/or provide
an output to one of the 8 BRG pins.
Input Clock 7
The CPM supports up to 10 clock input pins. The clocks are
sent to the bank-of-clocks selection logic, where they can be
routed to the controllers.
Input Timer Input 4
A timer can have one of the following sources: another timer,
system clock, system clock divided by 16 or a timer input. The
CPM supports up to 4 timer inputs. The timer inputs can be
captured on the rising, falling or both edges.
Output DMA: Data Acknowledge 2
DACK2, DREQ2, DRACK2 and DONE2 belong to the SIU
DMA. DONE2 and DRACK2 are signals on the same pin and
therefore cannot be used simultaneously. There are two sets
of DMA pins associated with the PIO ports.
Output Baud-Rate Generator 8 Output
The CPM supports up to 8 BRGs. The BRGs can be used
internally by the bank-of-clocks selection logic and/or provide
an output to one of the 8 BRG pins.
Input Clock 8
The CPM supports up to 10 clock input pins. The clocks are
sent to the bank-of-clocks selection logic, where they can be
routed to the controllers.
Input Timer Input 3
A timer can have one of the following sources: another timer,
system clock, system clock divided by 16, or a timer input.
The CPM supports up to four timer inputs. The timer inputs
can be captured on the rising, falling, or both edges.
Output Timer 4: Timer Out 4
The timers (Timer1–4]) can output a signal on a timer output
(TOUT[1–4]) when the reference value is reached. This signal
can be an active-low pulse or a toggle of the current output.
The output can also be connected internally to the input of
another timer, resulting in a 32-bit timer.
Input DMA: Data Request 2
DACK2, DREQ2, DRACK2, and DONE2 belong to the SIU
DMA. DONE2 and DRACK2 are signals on the same pin and
therefore cannot be used simultaneously. There are two sets
of DMA pins associated with the PIO ports.
Description
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