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Bit 7—Test Mode (TEST): Selects test mode, which is used in testing the chip. Normally this bit
should be cleared to 0.
Bit 7
TEST
Description
0
PWM (D/A) in user state: normal operation
1
PWM (D/A) in test state: correct conversion results unobtainable
Bit 6—PWM Enable (PWME): Starts or stops the PWM D/A counter (DACNT).
Bit 6
PWME
Description
0
DACNT operates as a 14-bit up-counter
1
DACNT halts at H'0003
Bits 5 and 4—Reserved: These bits cannot be modified and are always read as 1.
Bit 3—Output Enable B (OEB): Enables or disables output on PWM D/A channel B.
Bit 3
OEB
Description
0
PWM (D/A) channel B output (at the PWM1/PWM3 pin) is disabled
1
PWM (D/A) channel B output (at the PWM1/PWM3 pin) is enabled
Bit 2—Output Enable A (OEA): Enables or disables output on PWM D/A channel A.
Bit 2
OEA
Description
0
PWM (D/A) channel A output (at the PWM0/PWM2 pin) is disabled
1
PWM (D/A) channel A output (at the PWM0/PWM2 pin) is enabled
Bit 1—Output Select (OS): Selects the phase of the PWM D/A output.
Bit 1
OS
Description
0
Direct PWM output
1
Inverted PWM output
(Initial value)
(Initial value)
(Initial value)
(Initial value)
(Initial value)
553
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