Endian Issues; Processor/Memory Domain; Pci Domain - Motorola MVME2301 Installation And Use Manual

Programming the MVME230x

Endian Issues

4

Processor/Memory Domain

PCI Domain

4-10
The MVME230x supports both little-endian (e.g., Windows NT)
and big-endian (e.g., AIX) software. The PowerPC processor and
the VMEbus are inherently big-endian, while the PCI bus is
inherently little-endian. The following sections summarize how the
MVME230x handles software and hardware differences in big- and
little-endian operations. For further details on endian
considerations, refer to the MVME2300-Series VME Processor
Module ProgrammerÕs Reference Guide.
The MPC603/604 processor can operate in both big-endian and
little-endian mode. However, it always treats the external
processor/memory bus as big-endian by performing address
rearrangement and reordering when running in little-endian mode.
The MPC registers in the Raven MPU/PCI bus bridge controller
ASIC and the Falcon memory controller chip set, as well as DRAM,
Flash, and system registers, always appear as big-endian.
Role of the Raven ASIC
Because the PCI bus is little-endian, the Raven performs byte
swapping in both directions (from PCI to memory and from the
processor to PCI) to maintain address invariance while
programmed to operate in big-endian mode with the processor and
the memory subsystem.
In little-endian mode, the Raven reverse-rearranges the address for
PCI-bound accesses and rearranges the address for memory-bound
accesses (from PCI). In this case, no byte swapping is done.
The PCI bus is inherently little-endian. All devices connected
directly to the PCI bus operate in little-endian mode, regardless of
the mode of operation in the processorÕs domain.