Real-Time Clock/Nvram/Timer Function - Motorola MVME2301 Installation And Use Manual

Accesses to the configuration space for the PIB controller are
performed by way of the CONADD and CONDAT (Configuration
Address and Data) registers in the Raven bridge controller ASIC.
The registers are located at offsets $CF8 and $CFC, respectively,
from the PCI I/O base address.

Real-Time Clock/NVRAM/Timer Function

The MVME230x employs an SGS-Thomson surface-mount
M48T59/T559 RAM and clock chip to provide 8KB of non-volatile
static RAM, a real-time clock, and a watchdog timer function. This
chip supplies a clock, oscillator, crystal, power failure detection,
memory write protection, 8KB of NVRAM, and a battery in a
package consisting of two parts:
Ð ISA (Industry Standard Architecture) bus DMA (not
functional on MVME230x)
Ð The PHB (PCI Host Bridge) MPU/local bus interface
function, implemented by the Raven ASIC
Ð All on-board PCI devices
Ð The PMC slot
ISA bus arbitration for DMA devices
ISA interrupt mapping for four PCI interrupts
Interrupt controller functionality to support 14 ISA interrupts
Edge/level control for ISA interrupts
Seven independently programmable DMA channels
One 16-bit timer
Three interval counters/timers
A 28-pin 330mil SO device containing the real-time clock, the
oscillator, power failure detection circuitry, timer logic, 8KB
of static RAM, and gold-plated sockets for a battery
A SNAPHAT battery housing a crystal along with the battery
Functional Description
3-17
3