Toshiba TLCS-90 Series Data Book page 15

TOSHIBA TMP 8048A/TMP 8035A, TM? 8049A/TMP 8039A
RESET (Input)
Active Low signal which is used to initialize the Processor. Also used
during Power down.
ALE (Outpu t)
Address Latch Enable. This signal occurs once during each cycle and is
useful as a clock output. The negative edge of ALE strobes address into
external data and program memory.
PSEN (Output)
Program Store Enable. This output Qccurs only during a fetch to external
program memory (Active Low).
SS (Input)
Single Step input can be used in conjunction with ALE to "single step"
processor through each instruction when
55
is low the CPU is placed into
a wait state after it has completed the instruction being excuted.
EA (Input)
External Access input which forces all program memory fetchs to reference
external memory. Useful for emulation and debug and essential for
testing and program verification. (Active High).
XTAL 1 (Input)
One side of crystal input for internal oscillator. Also input for
external source.
XTAL 2 (Input)
Other side of crystal input.
FUNCTIONAL DESCRIPTION
1. System Configuration
(1)
• The following system functions of the TMP8048A are described in detail.
0)
Program Memory
(6)
Stack (Stack Pointer)
(2)
Data Memory
(7)
Flag 0, Flag 1
(3) I/O Port (8)
Program Status Word (PSW)
(4)
Timer/Counter (9) Reset
(5) Interrupt Control Circuit
(10)
Oscillator Circuit
Program Memory
• The maximum memory that can be directly addressed by the TMP8048A is
4096 bytes. The first 1024 bytes from location 0 through 1023
(TMP8048A) or the first 2048 bytes from location 0 to 2047 (TMP8049A)
can be internal resident mask ROM. The rest of the 3072 bytes or the
2048 bytes of addressable memory are external to the chip. The
TMP8035A and TMP8039A have has no internal resident memory; all memory
must be external.
MCU48-S