TXZ Family Ocsillation Frequency Detector Contents Preface ................................4 Related document ..............................4 Conventions ................................5 Terms and Abbreviations ............................7 Outlines ..............................8 Configuration .............................. 9 Function and Operation ..........................10 3.1. Setting method ..............................10 3.2. Detection Frequency ............................11 3.3.
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TXZ Family Ocsillation Frequency Detector List of Figures Figure 2.1 Oscillation Frequency Detector Block diagram ............... 9 Figure 3.1 Example of detection frequency range (in case of 10MHz) ..........11 Figure 5.1 Example of operational procedure ..................18 List of Tables Table 2.1 List of signals ...........................
TXZ Family Ocsillation Frequency Detector Preface Related document Document name Clock Control and Operation Mode Exception Power Supply and Reset Operation Product Information 2018-03-09 4 / 20 Rev. 1.1...
TXZ Family Ocsillation Frequency Detector Conventions ● Numeric formats follow the rules as shown below: Hexadecimal: 0xABC Decimal: 123 or 0d123 – Only when it needs to be explicitly shown that they are decimal numbers. Binary: 0b111 – It is possible to omit the “0b” when the number of bit can be distinctly understood from a sentence.
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TXZ Family Ocsillation Frequency Detector *********************************************************************************************************************** Arm, Cortex and Thumb are registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere. All rights reserved. *********************************************************************************************************************** The Flash memory uses the Super Flash® technology under the license of Silicon Storage Technology, Inc. Super Flash®...
TXZ Family Ocsillation Frequency Detector Terms and Abbreviations Some of abbreviations used in this document are as follows: Oscillation Frequency Detector EHOSC External High Speed Oscillator IHOSC2 Internal High Speed Oscillator 2 2018-03-09 7 / 20 Rev. 1.1...
TXZ Family Ocsillation Frequency Detector 1. Outlines Oscillation Frequency Detector (OFD) detects abnormalities as the clock signal to monitor exceeding the range of the set-up frequency. The lists of functions are as follows. Function Function Operation Classification External high speed oscillator clock (f EHOSC Monitor clock High speed clock (f c )
TXZ Family Ocsillation Frequency Detector 2. Configuration The block diagram of the frequency detection circuit is shown as follows: IHO SC2 EHOSC The frequency Switch Intend Reference detective reset intend detection clock output detection clock clock OFDRSTOUT Oscillation Frequency Detection Circuit Minimum Minimum...
TXZ Family Ocsillation Frequency Detector 3. Function and Operation Oscillation Frequency Detector (OFD) is a function to detect the abnormality of the clock. 3.1. Setting method When you use OFD, please set an applicable clock enable bit to “1” (clock supply) in fsys supply stop register A ([CGFSYSENA], [CGFSYSMENA]), fsys supply stop register B ([CGFSYSENB],[CGFSYSMENB]), and fc supply stop registers ([CGFCEN]).
TXZ Family Ocsillation Frequency Detector 3.2. Detection Frequency There are detected frequency ranges and undetected frequency ranges in the frequency detection function depending on the oscillation accuracy of the reference clock. The frequency detection is not ensured in the range between the detected frequency and undetected frequency.
TXZ Family Ocsillation Frequency Detector When the deviation of the reference clock frequency is ±10 % and the deviation of the target clock frequency is ±1 % (Undetected area), the setting values of [OFDMN1]<OFDMN1> and [OFDMX1]<OFDMX1> are calculated as follows. In this example, <OFDMX1> is rounded up and <OFDMN1> is rounded down. Table 3.1 Clock examples Max 10.1 MHz ----------...
TXZ Family Ocsillation Frequency Detector 3.5. Available operation Mode of MCU The frequency detection circuit is available only in the NORMAL mode and the IDLE mode. When the transition to the other mode is done, the frequency detection circuit should be stopped. 3.6.
TXZ Family Ocsillation Frequency Detector 4. Registers 4.1. List of Registers The control registers and their addresses are shown in the following table. Base address Function Peripheral function Channel/Unit name TYPE 1 TYPE 2 TYPE 3 Oscillation Frequency Detector 0x400F1000 0x400E4000 0x40084000 Note: The Channel/Unit and Base address type are different by products.
TXZ Family Ocsillation Frequency Detector 4.2. [OFDCR1] (Frequency Detection Control Register 1) After Function Bit Symbol Type Reset 31:8 Read as 0. Register write control 0x06: Disabled. 0xF9: Enabled. When “0xF9” is set, the registers other than [OFDCR1] can be OFDWEN[7:0] 0x06 written.
TXZ Family Ocsillation Frequency Detector 4.6. [OFDMX0] (Maximum Detection Frequency Setting Register 0 (EHOSC)) After Bit Symbol Type Function Reset 31:12 Read as 0. 11:0 OFDMX0[11:0] 0x000 The upper limit value of the detection frequency is set. (f EHOSC Note: This register cannot be written when the frequency detection is enabled. 4.7.
TXZ Family Ocsillation Frequency Detector 4.10. [OFDSTAT] (Status Register) After Bit Symbol Type Function Reset 31:2 Read as 0. OFD operation status OFDBUSY 0: Stop. 1: Operating. Error detecting flag FRQERR 0: No Error 1: Error 2018-03-09 17 / 20 Rev.
TXZ Family Ocsillation Frequency Detector 5. Usage Example The operation procedure of the frequency detection circuit is as follows: When a reset is asserted, the cause of the reset should be checked in the [RLMRSTFLG1] register. If the cause is not the frequency detection reset, the external oscillation should be enabled, the register settings should be done to use the frequency detection circuit, and its operation should be enabled.
TXZ Family Ocsillation Frequency Detector 6. Revision History Table 6.1 Revision History Revision Date Description 2017-09-08 First release 1. Outlines Added (Note) in Standard clock 3.2 Detection Frequency 2018-03-09 Added note on Table 3.1 Corrected: “<OFDM1>”->” <OFDMN1>” 4.1. List of Registers Added: Base address (TYPE 3) 2018-03-09 19 / 20...
Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application with which the Product will be used with or for.