Toshiba TC9349AFG Manual page 59

Cmos digital integrated circuit silicon monolithic
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Timer port
Equipped with 200 Hz, 100 Hz, 10 Hz and 2 Hz F/F bits, the timer is used for counting of clock operations and of tuning
scan mode. Through selection in the timer port for interrupt, interrupts can be generated with a 100 Hz or 200 Hz rising
edge.
1. Timer port
Timer interrupt control
Timer interruption control
Y1
Y2
2Hz
φL2A
Timer
F/F
Y1
Y2
2Hz
φK2A
10Hz 100Hz 200Hz
F/F
The timer ports are accessed with an OUT2/IN2 instruction for which [CN = AH] has been specified in the operand.
2. Timer port timing
The 2 Hz timer F/F is set with the 2 Hz (500 ms) signal and is reset by setting "1" in the 2 Hz F/F of the reset port. This
bit is usually used as a clock counter.
The 2 Hz timer F/F can only be reset with the 2 Hz F/F of the reset port; therefore not resetting within a 500 ms cycle
will result in count errors and failure to obtain the correct time.
2 Hz F/F output
2 Hz F/F reset execution
2 Hz clock
Y4
Y8
CK
ENA
SEL
Timer port interrupt selection (refer to the section on the interrupt function)
Select of timer interruption (refer to section in interruption function)
0 : Serial interface / Detected decrease voltage
1 : Timer port
Selection of interrupt timer
Select of interruption timer
0 : 100 Hz
1 : 200 Hz
The 2 Hz is reset whenever "1"is set.
The 2 Hz timer F/F is reset every time "1" is set.
The counters for 200 Hz, 100 Hz, and 10 Hz bits, and for
The 200 Hz, 100 Hz, 10 and under 1 kHz bits are reset
1 kHz and under, are reset every time "1" is set.
whenever "1" is set.
Y4
Y8
500 ms
59
TC9349AFG
Decreased voltage detection function
t < 500 ms
t
Reset port
2006-02-24

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