Toshiba TC9349AFG Manual page 20

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Mnemonic
Instruction
Function
Set
LD r, M*
ST M*, r
MVSR M1, M2
MVIM M, I
MVGD r, M
MVGS M, r
STIG I*
MVAR
IN1 M, C
OUT1 M, C
IN2 M, C
OUT2 M, C
IN3 M, C
OUT3 M, C
ORR r, M
ANDR r, M
ORIM M, I
ANIM M, I
XORIM M, I
XORR r, M
Function Operation
Load memory to
r ← (M*)
general register
Store memory to
M* ← (r)
general register
Move memory to
(DR, DC1) ← (DR,
memory in same
DC2)
row
Move immediate
M ← I
data to memory
Move memory to
destination memory
[(G), (r)] ← (M)
referring to
G-register and
general register
Move source
memory referring to
(M) ← [(G), (r)]
G-register and
general register to
memory
Move immediate
G ← I*
data to G-register
Move DATA register
data to DAL AR← (DATA)
address register
Input IN1 port data
M ← [IN1] C
to memory
Output contents of
[OUT1] C ← (M)
memory to OUT1
port
Input IN2 port data
M ← [IN2] C
to memory
Output contents of
[OUT2] C ← (M)
memory to OUT2
port
Input IN3 port data
M ← [IN3] C
to memory
Output contents of
[OUT3] C ← (M)
memory to OUT3
port
Logical OR of
r ← (r) ∨ (M)
general register and
memory
Logical AND of
r ← (r) ∧ (M)
general register and
memory
Logical OR of
M ← (M) ∨ I
memory and
immediate data
Logical AND of
M ← (M) ∧ I
memory and
immediate data
Logical exclusive
M ← (M) ∀ I
OR of memory and
immediate data
Logical exclusive
OR of general
r ← (r) ∀ (M)
register and
memory
20
TC9349AFG
Machine Language (16 Bits)
IC A B
(6 Bits) (2 Bits) (4 Bits)
DR*
0101 DC
(4 bits)
DR*
0110 DC
(4 bits)
001111 DR DC1
000111 DR DC
011110 DR DC
011111 DR DC
111111 I*
⎯ ⎯
111111
111000 DR DC
111011 DR DC
111001 DR DC
111100 DR DC
111010 DR DC
111101 DR DC
001100 DR DC
001101 DR DC
000100 DR DC
000101 DR DC
000110 DR DC
001110 DR DC
2006-02-24
C
(4 Bits)
RN
RN
DC2
I
RN
RN
0010
1001
CN
CN
CN
CN
CN
CN
RN
RN
I
I
I
RN