Toshiba TC9349AFG Manual page 107

Unlock detection port (UNLOCK RESET, UNLOCK F/F and ENA bits)
The unlock F/F detects the phase difference between the programmable counter frequency-divided output and the
reference frequency at the timing with a phase shift of about 180°. If the phases do not match, or are in an unlocked
state, the unlock F/F will be set. Each time the unlock reset bit is set to "1", the unlock F/F will be reset.
To detect the phase difference during the reference frequency cycle, it is necessary to provide an unlock F/F reset
time no shorter than the reference frequency cycle before the unlock F/F is accessed. The enable bit is provided for
this purpose. Make sure that the unlock enable is set to "1" before the unlock F/F is accessed.
2. Phase Comparator and Unlock Port Timing
Reference
基準周波数
frequency
プログラマブル
Programmable
カウンタ出力
counter output
DO output
DO出力
Phase difference
位相誤差
ロック検出ストローブ
Lock detection strobe
アンロックリセット
Unlock reset execution
の実行
アンロックF/F Unlock F/F
アンロックイネーブ
Unlock enable
ル
P出力(DO1端子)
P output (DO1 pin)
N output (DO2 pin)
N出力(DO2端子)
High impedance
ハイインピーダンス
107
TC9349AFG
"H" レベル(VDB) "H" level
"L" level
"L"レベル(GND)
"H" level (VDB)
"H" レベル(VDB)
"L" level (GND)
"L"レベル(GND)
"H" level (VDB)
"H" レベル(VDB)
"L" level (GND)
"L"レベル(GND)
2006-02-24