Sharp Blue Treak LH75400 User Manual page 196

System-on-chip preliminary

Table of Contents

LH75400/01/10/11 (Preliminary) User's Guide

Direct Memory Access Controller

The Int0-Int3 bits are the data stream interrupt flags corresponding to data stream0

through data stream3. A data stream sets its corresponding interrupt flag when a data

transfer is completed (the whole packet has been transferred to its destination).

The ErrorInt[3:0] bits are the Error interrupt flags corresponding to data stream0 through

data stream3. An error interrupt flag is set when its corresponding data stream's transfer

is aborted due to an AHB transfer error. When this occurs, the stream is disabled until the

Enable bit is again set by software.

The Active flags are used to indicate if a data stream is transferring data. It is HIGH if a

data transfer is in progress. The Active flags have the same polarity as the Enable bits in

the Data Stream Control Register.

The interrupt flags generated by the DMA Controller are combined and supplied to the

Interrupt Controller as a combined interrupt.