Vectored Interrupt Controller
10.2.2.6 Interrupt Enable Clear Register
IntEnClear is the Interrupt Enable Clear Register. This register clears bits in the IntEnable
Register (see Section 10.2.2.5).
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:0 IntEnable Clear
10-14
Table 10-13. IntEnClear Register
31
30
29
28
27
0
0
0
0
0
W
W
W
W
W
15
14
13
12
11
0
0
0
0
0
W
W
W
W
W
Table 10-14. IntEnClear Register Definitions
NAME
Clear IntEnable Bit Clears bits in the IntEnable Register.
0 = Has no effect.
1 = Clears the corresponding bit in the IntEnable Register.
Bits [31:0] correspond to the interrupt order in the Interrupt Assignments
Table (see Table 10-1).
LH75400/01/10/11 (Preliminary) User's Guide
26
25
24
23
22
IntEnable Clear
0
0
0
0
W
W
W
W
W
10
9
8
7
IntEnable Clear
0
0
0
0
W
W
W
W
W
0x014
0xFFFFF000 +
DESCRIPTION
6/17/03
21
20
19
18
0
0
0
0
0
W
W
W
W
6
5
4
3
2
0
0
0
0
0
W
W
W
W
17
16
0
0
W
W
1
0
0
0
W
W