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Samsung S3C8248 User Manual page 87

8-bit cmos

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CONTROL REGISTERS
TBCON
— Timer B Control Register
Bit Identifier
RESET Value
RESET
Read/Write
Addressing Mode
.7–.6
.5–.4
.3
.2
.1
.0
NOTE: fxx is selected clock for system.
4-42
.7
.6
0
0
R/W
R/W
Register addressing mode only
Timer B Input Clock Selection Bits
0
0
fxx
0
1
fxx/2
1
0
fxx/4
1
1
fxx/8
Timer B Interrupt Time Selection Bits
0
0
Elapsed time for low data value
0
1
Elapsed time for high data value
1
0
Elapsed time for low and high data values
1
1
Invalid setting
Timer B Interrupt Enable Bit
0
Disable Interrupt
1
Enable Interrupt
Timer B Start/Stop Bit
0
Stop timer B
1
Start timer B
Timer B Mode Selection Bit
0
One-shot mode
1
Repeating mode
Timer B Output flip-flop Control Bit
0
T-FF is low
1
T-FF is high
S3C8248/C8245/P8245/C8247/C8249/P8249
.5
.4
0
0
R/W
R/W
R/W
ECH
Set 1, Bank 0
.3
.2
.1
0
0
0
R/W
R/W
.0
0
R/W

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