Download Print this page

Samsung S3C8248 User Manual page 201

8-bit cmos

Advertisement

RESET
and POWER-DOWN
HARDWARE RESET VALUES
Table 8-1, 8-2, 8-3 list the reset values for CPU and system registers, peripheral control registers, and peripheral
data registers following a reset operation. The following notation is used to represent reset values:
— A "1" or a "0" shows the reset bit value as logic one or logic zero, respectively.
— An "x" means that the bit value is undefined after a reset.
— A dash ("–") means that the bit is either not used or not mapped, but read 0 is the bit value.
Table 8-1. S3C8245/P8245 Set 1 Register and Values after RESET
Register Name
LCD Control Register
LCD Mode Register
Interrupt Pending Register
Basic Timer Control Register
Clock Control Register
System Flags Register
Register Pointer (High Byte)
Register Pointer (Low Byte)
Stack Pointer (High Byte)
Stack Pointer (Low Byte)
Instruction Pointer (High Byte)
Instruction Pointer (Low Byte)
Interrupt Request Register
Interrupt Mask Register
System Mode Register
Register Page Pointer
8-2
Mnemonic
Address
Dec
LCON
208
LMOD
209
INTPND
210
BTCON
211
CLKCON
212
FLAGS
213
RP0
214
RP1
215
SPH
216
SPL
217
IPH
218
DAH
IPL
219
DBH
IRQ
220
DCH
IMR
221
DDH
SYM
222
DEH
PP
223
DFH
S3C8248/C8245/P8245/C8247/C8249/P8249
RESET
Bit Values after R R ESET
Hex
7
6
5
D0H
0
0
0
D1H
0
0
0
D2H
0
0
0
D3H
0
0
0
D4H
0
0
0
D5H
x
x
x
D6H
1
1
0
D7H
1
1
0
D8H
x
x
x
D9H
x
x
x
x
x
x
x
x
x
0
0
0
x
x
x
0
0
0
0
ESET
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
x
x
x
0
0
0
0
0
1
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
0
0
0
0
x
x
x
x
x
x
x
x
0
0
0
0
0
0
0

Advertisement

loading

This manual is also suitable for:

C8245P8245C8249C8247P8249