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INSTRUCTION SET
OR
— Logical OR
OR
dst,src
dst ← dst OR src
Operation:
The source operand is logically ORed with the destination operand and the result is stored in the
destination. The contents of the source are unaffected. The OR operation results in a "1" being
stored whenever either of the corresponding bits in the two operands is a "1"; otherwise a "0" is
stored.
Flags:
C: Unaffected.
Z: Set if the result is "0"; cleared otherwise.
S: Set if the result bit 7 is set; cleared otherwise.
V: Always cleared to "0".
D: Unaffected.
H: Unaffected.
Format:
opc
opc
opc
Examples:
Given: R0 = 15H, R1 = 2AH, R2 = 01H, register 00H = 08H, register 01H = 37H, and
register 08H = 8AH:
OR
OR
OR
OR
OR
In the first example, if working register R0 contains the value 15H and register R1 the value
2AH, the statement "OR R0,R1" logical-ORs the R0 and R1 register contents and stores the
result (3FH) in destination register R0.
The other examples show the use of the logical OR instruction with the various addressing
modes and formats.
6-62
dst | src
src
dst
dst
src
→
R0,R1
R0 = 3FH, R1 = 2AH
→
R0,@R2
R0 = 37H, R2 = 01H, register 01H = 37H
→
00H,01H
Register 00H = 3FH, register 01H = 37H
01H,@00H →
Register 00H = 08H, register 01H = 0BFH
→
00H,#02H
Register 00H = 0AH
S3C8248/C8245/P8245/C8247/C8249/P8249
Bytes
Cycles
Opcode
2
4
6
3
6
6
3
6
Addr Mode
(Hex)
dst
src
42
r
r
43
r
lr
44
R
R
45
R
IR
46
R
IM
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