Vi-2-12. Keyboard Interface - Canon A-200 series Service Manual

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1/0
Address
A1
AO
RD WR
0040
L
L
L
H
Read Counter No.O
0040
L
L
H
L
Load Counter No.o
0041
L
H
L
H
Read Counter No.1
0041
L
H
H
L
Load Counter No.1
0042
H
L
L
H
Read Counter No.2
0042
H
L
H
L
Load Counter No.2
0043
H
H
L
H
No-operation (3-state)
0043
H
H
H
L
Write Mode Word
Table 6·7
VI-2-12. Keyboard Interface
The keyboard interface converts serial data comes from the keyboard unit to parallel data. An­
other role of this circuit is to notify the soft reset status to the one chip microprocessor (8048)
mounted on the internal board of the keyboard unit.
Above functions are performed by using two bi-directional interface signals, KDATA and KCLK.
Before sending data, the keyboard unit confirms that neither KCLK signal nor KDATA signal is
HIGH level. If so, it sends data as shown in Figure 6-20.
-r--'-""67.5ps
97.5-260ps
KCLK
,
27.5ps
7.5ps
Start Bit
KDATA
Figure 6·20
First data to be sent to this interface is the start bit (HIGH level) which denotes that an 8-bit data
will follow it. This data will then be sent to the SL (Shift Left) terminal of the shift register U94.
As for the KCLK signal, it is not only converted through two stages of flip-flop but also synchronized
with the clock signal inside the main PC.B. (PCLK).
In this case, since a cycle of the KCLK is approximately 100 micro seconds while a cycle of the
PCLK is approximately 400 nano seconds, a delay of the KCLK signal is not an important factor
in receiving key data. The inverted KCLK signal is input to the CLK terminal of U49, then shifts
the 8-bit data followed by the start bit sequentially at every falling edge of the KCLK signal. When
the eighth falling edge comes, U94 then outputs HIGH level start bit from its QA terminal. Thus
at the ninth falling down edge of the KCLK signal, U94 sends an interrupt signal to the CPU
from U109 through the PIC indicating that one byte of key data is now ready for use. At the same
time, the Q terminal of U109 makes U123 connected to the KDATA line enable and then forces
the KDATA line to become LOW leve\.
71

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