16-Bit Mpg Noise Cancellation Control Register (Nccr) - Fujitsu 8FX Hardware Manual

MB95630H Series
21.6.9 16-bit MPG Noise Cancellation Control Register
(NCCR)
The 16-bit MPG noise cancellation control register (NCCR) controls the noise
pulse width to be cancelled on the DTTI pin and SNIx pin.
■ Register Configuration
bit 7
Field S21
Attribute R/W
Initial value 0
■ Register Functions
[bit7:6] S2[1:0]: SNI2 noise width select bits
These bits select the noise width to be cancelled on the SNI2 pin.
bit7:6
Writing "00"
Writing "01"
Writing "10"
Writing "11"
[bit5:4] S1[1:0]: SNI1 noise width select bits
These bits select the noise width to be cancelled on the SNI1 pin.
bit5:4
Writing "00"
Writing "01"
Writing "10"
Writing "11"
[bit3:2] S0[1:0]: SNI0 noise width select bits
These bits select the noise width to be cancelled on the SNI0 pin.
bit3:2
Writing "00"
Writing "01"
Writing "10"
Writing "11"
[bit1:0] D[1:0]: DTTI noise width select bits
These bits select the noise width to be cancelled on the DTTI pin.
bit1:0
Writing "00"
Writing "01"
Writing "10"
Writing "11"
MN702-00009-2v0-E
6 5
S20 S11
R/W R/W
0 0
4-machine cycle noise
8-machine cycle noise
16-machine cycle noise
32-machine cycle noise
4-machine cycle noise
8-machine cycle noise
16-machine cycle noise
32-machine cycle noise
4-machine cycle noise
8-machine cycle noise
16-machine cycle noise
32-machine cycle noise
4-machine cycle noise
8-machine cycle noise
16-machine cycle noise
32-machine cycle noise
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 21 MULTI-PULSE GENERATOR
4 3
S10 S01
R/W R/W
0 0
Details
Details
Details
Details
21.6 Registers
2 1
S00 D1
R/W R/W
0 0
0
D0
R/W
0
449