Fujitsu 8FX Hardware Manual page 428

CHAPTER 21 MULTI-PULSE GENERATOR
21.5 Operations
The data transfer from the 16-bit MPG output data buffer register (upper/lower) (OPDBRHx/
OPDBRLx) specified by the BNKF bit and the RDA[2:0] bits to the 16-bit MPG output data
register (upper) (OPDUR) is updated automatically whenever a 16-bit reload timer underflow
is generated as shown in Figure 21.5-15.
In order to use this method, use the 16-bit reload timer in reload mode. use the software trigger
to start the 16-bit reload timer. The 16-bit reload timer is needed for setting the update time in
advance and executing the continuous control action.
■ Timing Generated by Reload Timer Underflow (OPS[2:0] = 0b001)
Figure 21.5-15 Timing Generated by Reload Timer Underflow (OPS[2:0] = 0b001)
Reload
timer
counter
action
RDA[2:0]
0b100
(OPDUR)
WTIN0
(TOUT)
WTO
OP0[1:0]
0b00
(OPDLR)
PPG
OPT0
406
0b110 0b101
0b01 0b11
FUJITSU SEMICONDUCTOR LIMITED
MB95630H Series
0b011
0b001
0b00
0b10
MN702-00009-2v0-E