16-Bit Ppg Downcounter Register (Upper/Lower) Ch. N (Pdcrhn/Pdcrln) - Fujitsu 8FX Hardware Manual

MB95630H Series
19.7.1 16-bit PPG Downcounter Register (Upper/Lower)
ch. n (PDCRHn/PDCRLn)
The 16-bit PPG downcounter register (upper) ch. n (PDCRHn) and the 16-bit
PPG downcounter register (lower) ch. n (PDCRLn) form a 16-bit register that is
used to read the count value from the 16-bit PPG downcounter.
■ Register Configuration
PDCRHn
bit 7
Field DC15
Attribute R
Initial value 0
PDCRLn
bit 7
Field DC07
Attribute R
Initial value 0
■ Register Functions
These registers form a 16-bit register that is used to read the count value from the 16-bit
downcounter. The initial values of the register are all "0".
Always use one of the following procedures to read from this register.
• Use the "MOVW" instruction (use a 16-bit access instruction to read the PDCRHn register
address).
• Use the "MOV" instruction and read PDCRHn first and then PDCRLn (reading PDCRHn
automatically copies the lower 8 bits of the downcounter to PDCRLn).
This register is read-only and writing a value to this register has no effect on the operation.
Note:
If you use the "MOV" instruction and read PDCRLn before PDCRHn, PDCRLn returns the
value from the previous valid read operation. Therefore, the value of the 16-bit
downcounter cannot be read correctly.
MN702-00009-2v0-E
6 5
DC14 DC13
R R
0 0
6 5
DC06 DC05
R R
0 0
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 19 16-BIT PPG TIMER
4 3
DC12 DC11
R R
0 0
4 3
DC04 DC03
R R
0 0
19.7 Registers
2 1
DC10 DC09
R R
0 0
2 1
DC02 DC01
R R
0 0
0
DC08
R
0
0
DC00
R
0
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