GE DATANET-30 Programming Reference Manual page 84

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Although the above only discussed the bit time for the bit buffers, the scanning and processing
of character and word buffers follow the same rules. The scanning of character and word
buffers however is done by programming for each buffer.
The control of data transfer going to or from a buffer is accomplished by the register transfer
instructions, the C-register and the transmit/receive data lines. The receive buffer address
in the C-register allows the character or word in the re.ceive buffer to be set up on the receive
data lines.
The register transfer instruction -- that is, TRA R, B -- then transfers the
configuration of the receive data lines to the designated working register.
The transmit sequence using. the transmit data lines is basically the opposite of the sequence
using the receive data lines. The address of the transmit buffer is first set up in the C-register.
Then the transfer of the configuration in one of the FROM registers, again using a register
transfer instruction, is transferred to the transmit data lines. The only transmit buffer that
will be able to accept the configuration on the transmit data lines will be the one addressed
by the C-register.
Line
·Interrupt
Service
Line Service
Hardware
Program Scan
Scan on
on Character
Process
Bit Basis
Basis
Bit Buff er Channel
Move character out
Move character to
Scan
of scan word 3 location
&
from memory location
Word
to accumulation location
for building wprds to
3
in memory for that line
blocks etc.
Character Buff er Channel
Move character out of
Do DSU operation
Char
character buffer to
Buffer
location in memory for
Do Tape Operation
the channel
Word Buff er Channel
Move word out of word
Do all other functions
Word
buffer to memory
Buffer
location
BBC
Move character to scan
Scan
~
Word 1
word 2 to be transmitted
CBC
I
Move character from memory
Char
I
~
Buffer:
to character buffer to be
transmitted
WBC
I
Word
I
Move word to word buffer
~
Buffer:
to be transmitted
Program Cycle
Figure 14. General Timing Diagram
[IDIA\lf&~~lJCJ ~@------------
V-3

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