Table of Contents
Advertisement
another is transferred into the data register.
When the program takes the character from
the data register, the data register and the receive flag are automatically reset.
The timing diagram (Figure 18} illustrates how an 8-bit word would be received at a CBC.
1.
The DEF 3 instruction puts the CBC into the receive mode.
2.
The DEF 1 instruction resets the receive flag and data buffer.
3.
The receive clock is shown sampling the line every bit period.
4.
Line 4 shows that the contents of the receive buffer are transferred to the data register
after all the bits are received.
5.
Line 5 shows the receive communications line going into the CBC.
6.
Line 6 shows what the receive buffer would look like after all bits are received.
7.
Line 8 shows the receive flag setting when the receive buffer is transferred to the
data register.
1
DEF 3
2
DEF 1
3
Rec. Clock
4
Transfer Receive
Buffer to Data
Register
5
Receive Line
6
Receive Buffer
7
Receive Flag
_n._ _ _ _
___ n _______ _
Figure 18. CBC Receive Timing Diagram
V-23
Advertisement
Table of Contents
