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TCD
PUNCH TRANSFER CARD.
Generates an instruction that transfers control to the location
specified in the operand field when the object program is being loaded. The operand may be
decimal or symbolic.
If
decimal, the address is converted to binary.
If
symbolic, the symbol
used must be predefined.
TCD may be used as often as desired in the source program. This
operation has no effect on the memory allocation register, so that the memory assignment by
the assembly program will continue in sequence.
ZXX - The Z is followed by 2 octal digits. These digits become the operation code portion of
the generated word (instruction).
The operand is computed normally and is assumed to be
either symbolic, decimal numeric, or a combination.
Assembly Errors and Suspected Errors
The following codes listed are errors or suspected errors found during assembly by the General
Assembly Program.
The objective is to convey as much error information as possible to the
programmer.
Except for machine malfunctions, the computer will stop only under three circumstances, during
assembly:
1.
The number of special symbolic operands exceeds the size of the symbol table (symbolic
table overflow).
2.
The total number of symbols exceeds the size of the symbol table.
3.
During the final phase of assembly, a name appearing in the symbol field cannot be
found in the symbol table (lost symbol).
When these errors occur, an indicative typeout results and the computer goes into a programmed
loop.
However, if desired, switch 19 may be manually set, and assembly will continue. The
result of forcing the assembly to continue is:
1.
The special symbolic operands encountered after the error halt are not entered in
symbol table 1.
This may result in the improper assignment of a memory address to
these symbols in the following phases.
2.
The symbols following the error halt and are not entered into symbol table 2. This will
result in the detection of undefined symbols during the final phase.
3.
Assembly will continue.
If
the symbolic name was a special operand, the assignment
of memory locations to the instructions following the error halt may be out of phase
with the numeric assignment performed by the previous phase of the assembly.
@&u&~~uc::J ~@------------
V-69
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