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Register Transfer Instructions
All of the register transfer instructions use the low order bits of the instruction to specify
which locations are to be included in the FROM group and which in the TO group. The possi-
bilities are:
FROM:
TO:
A
The A-register
B
The B-register
C
The C-counter
Q
The Q-counter
R
The receive data lines
(From X, the address of a
particular buffer)
S
The insert switches
c;2)
Zero is transferred to the
specified TO location
A
The A-register
B
The B-register
C
The C-counter
T
The transmit data lines
(To X, the address of a
particular buffer)
Z
The Z-drivers; FROM remains
unchanged.
Bit Position in I
10
9
8
7
6
5
4
3
2
1
If
R, S, or T is specified, the control bit 1, control bit 2, and parity flip-flops (internal functions)
are used for the "extra" positions, since R, S and T are all more than 18 bits.
Any register specified in the FROM group will remain unchanged after the register transfer
operation if it does not appear in the TO group.
If
R is specified in the FROM group, after the
data is transferred, the receive flag and receive data buffer are reset by an automatically
generated signal activating external function driver 1 (DEFl).
With the exception of T in the TO group, the TO register will contain the result after a register
transfer instruction.
If
T is specified in the TO group, before the data is transferred, the
transmit flag and transmit buffer are reset by an automatically generated signal activating
external function driver 2 (DEF2).
When a
register transfer instruction is executed, the contents of those registers which are
specified to be used as the FROM group for this instruction are logically OR-ed together into
the Y-register.
Then the data goes from Y to Z with the operation specified by the instruction
being performed on the data as it goes from Y to Z. Finally the result goes from the Z drivers
to all of those registers which are specified in the TO group. The plus, zero, and even flip-flops
lID&u&~~u~ ~@------------
II-12
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