Table of Contents
Advertisement
Register Port
The G register (mentioned in the CPU description) and the data register are treated as internal ports.
1. G Register (φ φ φ φ L1D~φ φ φ φ L1E)
This register sets the row address (D
instructions. To access this register, execute the OUT1 instruction with the operand [C
Note 62: The register value is only used when the MVGD or MVGS instructions are executed. The register is
ignored for other instructions.
Note 63: Setting data 00H~17H in the G register allows all the data memory row addresses to be specified
indirectly. (D
2. Data Register (φ φ φ φ K1C~φ φ φ φ K1F)
This is a 16 bit register to load the program memory data when the DAL instruction is executed. The
contents of the register are read to data memory in units of 4 bits by the IN1 instruction with the operands
[C
= CH~FH].
N
This register can be used for such purposes as LCD segment decoding, radio band edge data, or for
coefficient data for binary-to-BCD conversion.
= 04H~17H) in data memory for the MVGD and MVGS
R
= 00H~17H)
R
56
TC9314F
= D~E].
N
2003-07-03
Advertisement
Table of Contents
