Toshiba TC9314F Manual page 26

The OTC, OT, and Hz control bits of the DO2 control port set the DO2 output pin as a general-purpose
output port, and control whether DO2 goes to high impedance instead of outputting the phase difference.
Set these bits to the required values by program.
When the phase is approximately 180°, the unlock flip-flop bit detects the phase difference between the
divided output of the programmable counter and the reference frequency. If the phase difference does not
match, that is, if the PLL is unlocked, the unlock flip-flop is set. Also, setting the unlock reset bit to "1"
resets the unlock flip-flop.
To detect the phase difference during the reference voltage period, reset the unlock flip-flop, then access
the unlock flip-flop after waiting for a time longer than the reference frequency period. An enable bit is
supplied for this purpose. After confirming that the unlock enable bit is set to "1", access the unlock
flip-flop.
Setting the unlock reset bit to "1" resets the unlock enable bit.
Use the OUT1 and IN1 instructions with the operand [C
Note 28: When the PLL is off, the DO output is set to high impedance. However, when DO2 is set as an output
port (OT2 output), the data are output from the port without change.
2. Phase Comparator, Unlock Port Timing
= 9] to control these ports, and to load data.
N
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TC9314F
2003-07-03