Toshiba TC9314F Manual page 14

Mnemonic
Load memory to general
LD r, M*
register
Store general register to
ST M*, r
memory
Move memory to memory
MVSR M , M
1 2
in the same row
Move immediate data to
MVIM M, I
memory
Move memory to
destination memory
MVGD r, M
referring to G-register
and general register
Move source memory
referring to G-register
MVGS M, r
and general register to
memory
Move immediate data to
STIG I*
G-register
Input IN1 port data to
IN1 M, C
memory
Output contents of
OUT1 C, M
memory to OUT1 port
Input IN2 port data to
IN2 M, C
memory
Output contents of
OUT2 C, M
memory to OUT2 port
Input IN3 port data to
IN3 M, C
memory
Output contents of
OUT3 C, M
memory to OUT3 port
Logical OR of general
ORR r, M
register and memory
Logical AND of general
ANDR r, M
register and memory
Logical OR of memory
ORIM M, I
and immediate data
Logical AND of memory
ANIM M, I
and immediate data
Logical exclusive OR of
XORIM M, I memory and immediate
data
Logical exclusive OR of
XORR r, M general register and
memory
Explanation of Function Explanation of Operation
r
M*
(D
M
[(G), (r)]
M
G
M
[OUT1]
M
[OUT2]
M
[OUT3]
r
r
M
M
M
r
14
(6 bit)
(M*) 0101
(r) 0110
, D ) (D , D ) 001111
R C1 R C2
I 000111
(M) 011110
[(G), (r)] 011111
I* 111111
[IN1] 111000
C
(M) 111011
C
[IN2] 111001
C
(M) 111100
C
[IN3] 111010
C
(M) 111101
C
(r) (M) 001100
(r) (M) 001101
(M) I 000100
(M) I 000101
(M) I 000110
(r) (M) 001110
TC9314F
Machine Language (16 bit)
IC A B
(2 bit) (4 bit)
D *
R
D
C
(4 bit)
D *
R
D
C
(4 bit)
D D
R C1
D D
R C
D D
R C
D D
R C
I*
0
(5 bit)
D D
R C
D D
R C
D D
R C
D D
R C
D D
R C
D D
R C
D D
R C
D D
R C
D D
R C
D D
R C
D D
R C
D D
R C
2003-07-03
C
(4 bit)
R
N
R
N
D
C2
I
R
N
R
N
0010
C
N
C
N
C
N
C
N
C
N
C
N
R
N
R
N
I
I
I
R
N