NEC UPD98413 User Manual page 309

(4) Select-IR-Scan
This is a temporary boundary scan state. The boundary scan register and bypass register selected by the current
instruction hold the previous state.
If the JMS signal is held low at the rising edge of the JCK pin signal while the TAP controller is in this state, the
controller enters the Capture-IR state, and scan sequence to the selected registers is started.
If the JMS signal is held high at the rising edge of the JCK pin signal, the TAP controller enters the Test-Logic-Reset
state. While the controller is in this state, the instruction does not change.
(5) Capture-DR
In this controller state, data is loaded to the boundary scan register selected by the current instruction in parallel at
the rising edge of the JCK pin signal (in this case, data is input from the input pin of each device to the corresponding
boundary scan register). While the TAP controller is in this state, the instruction does not change.
If the TAP controller is in this state at the rising edge of the JCK pin signal, the controller enters the following state:
•
If the JMS pin signal is held high: Exit1-DR state
•
If the JMS pin signal is held low: Shift-DR state
(6) Shift-DR
In this controller state, JDI and JDO are connected (at either of the boundary scan register of bypass register) by the
current instruction. The shift data is shifted one state at a time toward the serial output direction at each rising edge of
the JCK pin signal.
The boundary scan register or bypass register selected by the current instruction holds the previous status without
change if the controller is not on the serial bus (not in the Shift-DR state). While the controller is in this state, the
instruction does not change.
If the TAP controller is in this state at the rising edge of the JCK pin signal, the controller enters the following state:
•
If the JMS pin signal is held high: Exit1-DR state
•
If the JMS pin signal is held low: Shift-DR state
(7) Exit1-DR
This is a temporary controller state. If the JMS pin signal is held high at the rising edge of the JCK pin signal with the
TAP controller in this state, the controller enters the Update-DR state. This ends the scan process.
If the JMS pin signal is held low at the rising edge of the JCK pin signal, the TAP controller enters the Pause-DR
state.
Both the bypass register and boundary scan register selected by the current instruction hold the previous status
without change. While the TAP controller is in this state, the instruction does not change.
(8) Pause-DR
In this controller state, shifting between JDI and JDO connected by either the bypass register or boundary scan
register is temporarily stopped. These registers selected by the current instruction hold the previous state without
change.
The TAP controller remains in this state while the JMS pin signal is low. If the JMS pin signal is held high at the rising
edge of the JCK pin signal, the TAP controller enters the Exit2-DR state. While the TAP controller is in this state, the
instruction does not change.
310
CHAPTER 6 JTAG BOUNDARY SCAN
PRELIMINARY
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