NEC UPD98413 User Manual page 306

CHAPTER 6 JTAG BOUNDARY SCAN
6.3 Pin Function
6.3.1 JCK (JTAG Clock) Pin
The JCK pin is used to supply a clock signal to the JTAG boundary scan circuit (such as the bypass register,
instruction register, and TAP controller. This clock signal is isolated so as not to be supplied to the other internal
circuits of the µPD98413.
6.3.2 JMS (JTAG Mode Select) Pin
Input to the JMS pin is latched at the rising edge of the clock input to the JCK pin and defines the operation of the
TAP controller.
6.3.3 JDI (JTAG Data Input) Pin
The JDI pin is an input pin that inputs data to the JTAG boundary scan circuit register.
6.3.4 JDO (JTAG Data Output) Pin
The JDO pin is an output pin that outputs data from the JTAG boundary scan circuit. This pin changes its output at
the falling edge of the clock input to the JCK pin. This pin is a tristate output pin and is controlled by the TAP
controller.
6.3.5 JRST_B (JTAG Reset) Pin
This pin asynchronously initializes the TAP controller. This reset signal sets the µPD98413 in the normal operation
mode and the boundary register in non-operation state.
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