Appendix D Revision History - NEC 78K0 User Manual

The following table shows the revision history up to this edition. The "Applied to:" column indicates the chapters of
each edition in which the revision was applied.
Edition
1st edition Modification of reset value of the following registers in Table 3-5 Special Function
(Modified Register List
version) • Serial I/O shift register 10 (SIO10)
• Serial I/O shift register 11 (SIO11)
• Interrupt mask flag register 1H (MK1H)
Modification of manipulatable bit unit of the following register in Table 3-5 Special
Function Register List
• Oscillation stabilization time counter status register (OSTC)
Modification of manipulatable bit unit and clear condition in 6.3 (5) Oscillation
stabilization time counter status register (OSTC)
Modification of Figure 6-13 Status Transition Diagram
Modification of Table 6-4 Oscillation Control Flags and Clock Oscillation Status
Modification of reset value in 7.2 (2) 16-bit timer capture/compare register 00n
(CR00n) and (3) 16-bit timer capture/compare register 01n (CR01n)
Modification of manipulatable bit unit in 7.3 (4) Prescaler mode register 0n (PRM0n)
Addition of caution description in 13.6 (10) A/D conversion result register (ADCR) read
operation
Modification of reset value in 16.2 (2) Serial I/O shift register 1n (SIO1n)
Modification of reset value in 19.3 (2) Interrupt mask flag register (MK1H)
Modification of manipulatable bit unit and clear condition in 21.1.2 (1) Oscillation
stabilization time counter status register (OSTC)
Modification of A/D converter item in Table 21-2 Operating Statuses in HALT Mode
Modification of stop condition of clock monitor in 23.1 Functions of Clock Monitor and
23.4 Operation of Clock Monitor
Addition of 24.4 Cautions for Power-on-Clear Circuit
Modification of Figure 25-3 Format of Low-Voltage Detection Level Selection
Register (LVIS)
Addition of 25.5 Cautions for Low-Voltage Detector
Modification of description in 26.1 Outline of Regulator
622

APPENDIX D REVISION HISTORY

Description
*
User's Manual U15947EJ2V0UD
(1/5)
Applied to:
CHAPTER 3 CPU
ARCHITECTURE
CHAPTER 6 CLOCK
GENERATOR
CHAPTER 7 16-BIT
TIMER/EVENT
COUNTERS 00 AND 01
CHAPTER 13 A/D
CONVERTER
CHAPTER 16 SERIAL
INTERFACES CSI10
AND CSI11
CHAPTER 19
INTERRUPT
FUNCTIONS
CHAPTER 21
STANDBY FUNCTION
CHAPTER 23 CLOCK
MONITOR
CHAPTER 24 POWER-
ON-CLEAR CIRCUIT
CHAPTER 25 LOW-
VOLTAGE DETECTOR
CHAPTER 26
REGULATOR