Ppg Output Operations - NEC 78K0 User Manual

7.4.2

PPG output operations

Setting 16-bit timer mode control register 0n (TMC0n) and capture/compare control register 0n (CRC0n) as shown
in Figure 7-18 allows operation as PPG (Programmable Pulse Generator) output.
Setting
The basic operation setting procedure is as follows.
<1> Set the CRC0n register (see Figure 7-18 for the set value).
<2> Set any value to the CR00n register as the cycle.
<3> Set any value to the CR01n register as the duty factor.
<4> Set the TOC0n register (see Figure 7-18 for the set value).
<5> Set the count clock by using the PRM0n register.
<6> Set the TMC0n register to start the operation (see Figure 7-18 for the set value).
Caution To change the value of the duty factor (the value of the CR01n register) during operation, see
Caution 2 in Figure 7-20 PPG Output Operation Timing.
Remarks 1. For the setting of the TO0n pin, see 7.3 (5) Port mode register 0 (PM0).
2. For how to enable the INTTM00n interrupt, see CHAPTER 19 INTERRUPT FUNCTIONS.
In the PPG output operation, rectangular waves are output from the TO0n pin with the pulse width and the cycle
that correspond to the count values preset in 16-bit timer capture/compare register 01n (CR01n) and in 16-bit timer
capture/compare register 00n (CR00n), respectively.
µ
Remark n = 0: PD780143, 780144
µ
n = 0, 1: PD780146, 780148, 78F0148
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CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
User's Manual U15947EJ2V0UD
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