Timing Of One-Shot Pulse Output Operation With Software Trigger - NEC 78K0 User Manual

Figure 7-37. Timing of One-Shot Pulse Output Operation with Software Trigger
Set TMC0n to 0CH
(TM0n count starts)
Count clock
TM0n count
0000H
CR01n set value
CR00n set value
OSPT0n
INTTM01n
INTTM00n
TO0n pin output
Caution 16-bit timer counter 0n starts operating as soon as a value other than 00 (operation stop mode) is
set to the TMC0n3 and TMC0n2 bits.
Remark N < M
(2) One-shot pulse output with external trigger
A one-shot pulse can be output from the TO0n pin by setting 16-bit timer mode control register 0n (TMC0n),
capture/compare control register 0n (CRC0n), and 16-bit timer output control register 0n (TOC0n) as shown in
Figure 7-38, and by using the valid edge of the TI00n pin as an external trigger.
The valid edge of the TI00n pin is specified by bits 4 and 5 (ES0n0, ES0n1) of prescaler mode register 0n
(PRM0n). The rising, falling, or both the rising and falling edges can be specified.
When the valid edge of the TI00n pin is detected, the 16-bit timer/event counter is cleared and started, and the
output becomes active at the count value set in advance to 16-bit timer capture/compare register 01n (CR01n).
After that, the output becomes inactive at the count value set in advance to 16-bit timer capture/compare register
Note
00n (CR00n) .
Note The case where N < M is described here. When N > M, the output becomes active with the CR00n
register and inactive with the CR01n register. Do not set N to M.
Caution Even if the external trigger is generated again while the one-shot pulse is output, it is ignored.
µ
Remark n = 0: PD780143, 780144
µ
n = 0, 1: PD780146, 780148, 78F0148
206
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
0001H N N + 1 0000H
N N
M M
User's Manual U15947EJ2V0UD
N – 1 N M – 1
N
M
*
M M + 1 M + 2
N
M