Mitsubishi Electric Melsec QJ71LP21 Reference Manual page 84

Q corresponding melsecnet/h network system
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3
SPECIFICATIONS
Sequence scan
Link scan
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(2) Link scan and link refresh
The link scan is executed "asynchronous" with the sequence scan of the CPU
module.
The link refresh is executed by the "END processing" of the CPU module.
0
END
Link refresh
POINT
When the CPU module is powered on or reset, even if latched device (listed in
"CPU side device" in the table below) data is cleared to "0" using a sequence
program, the latched data may be output depending on the timing of link scan and
link refresh.
For how to prevent outputting latched device data, refer to "Method for disabling
output" in the table below.
CPU side device
Latch relay (L)
File register (R, ZR)
Extended data register (D)
(Universal model QCPU only)
Extended link register (W)
(Universal model QCPU only)
Device within latch range
1: For initial device value setting, refer to the user's manual (Function
Explanation, Program Fundamentals) for the CPU module used.
0
END
0
Link refresh
Clear the device data to "0" using an
initial device value
Delete all latch range settings.
END
0
Link refresh
Method for disabling output
(
1)
.
MELSEC-Q
END
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