Philips LPC2119 User Manual page 266

Arm-based microcontroller
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ARM-based Microcontroller
; Initialize the IRQ mode stack for RealMonitor and User
BIC
r1, r0, #0x1f
ORR
r1, r1, #0x12
MSR
CPSR_c, r1
;Keep 32 bytes for Abort mode stack
SUB sp,r2,#0x7F
; Return to the original mode.
MSR
CPSR_c, r0
; Initialize the stack for user application
; Keep 256 bytes for IRQ mode stack
SUB sp,r2,#0x17F
; /*********************************************************************
; * Setup Vectored Interrupt controller. DCC Rx and Tx interrupts
; * generate Non Vectored IRQ request. rm_init_entry is aware
; * of the VIC and it enables the DBGCommRX and DBGCommTx interrupts.
; * Default vector address register is programmed with the address of
; * Non vectored app_irqDispatch mentioned in this example. User can setup
; * Vectored IRQs or FIQs here.
; *********************************************************************/
VICBaseAddr
VICDefVectAddrOffset EQU 0x34
LDR r0, =VICBaseAddr
LDR r1, =app_irqDispatch
STR r1, [r0,#VICDefVectAddrOffset]
BL rm_init_entry ;Initialize RealMonitor
;enable FIQ and IRQ in ARM Processor
MRS
r1, CPSR
BIC
r1, r1, #0xC0
MSR
CPSR_c, r1
; /*********************************************************************
; * Get the address of the User entry point.
; *********************************************************************/
LDR lr, =User_Entry
MOV pc, lr
; /*********************************************************************
; * Non vectored irq handler (app_irqDispatch)
; *********************************************************************/
AREA app_irqDispatch, CODE
VICVectAddrOffset EQU 0x30
app_irqDispatch
;enable interrupt nesting
STMFD sp!, {r12,r14}
MRS r12, spsr
MSR cpsr_c,0x1F
;User should insert code here if non vectored Interrupt sharing is
;required. Each non vectored shared irq handler must return to
;the interrupted instruction by using the following code.
;MSR cpsr_c, #0x52
RealMonitor
EQU 0xFFFFF000
; VIC Base address
; get the CPSR
; enable IRQs and FIQs
; update the CPSR
;Save SPSR in to r12
;Re-enable IRQ, go to system mode
;Disable irq, move to IRQ mode
LPC2119/2129/2292/2294
266
Preliminary User Manual
January 08, 2004

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