Pin Description - Philips LPC2119 User Manual

Arm-based microcontroller
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Philips Semiconductors
ARM-based Microcontroller
S
Slave Address
From Master to Slave
From Slave to Master
Slave Transmitter Mode:
The first byte is received and handled as in the slave receiver mode. However, in this mode, the direction bit will indicate that the
transfer direction is reversed. Serial data is transmitted via SDA while the serial clock is input through SCL. START and STOP
conditions are recognized as the beginning and end of a serial transfer. In a given application, I
as a slave. In the slave mode, the I
addresses is detected, an interrupt is requested. When the microcontroller wishes to become the bus master, the hardware waits
until the bus is free before the master mode is entered so that a possible slave action is not interrupted. If bus arbitration is lost
2
in the master mode, I
C switches to the slave mode immediately and can detect its own slave address in the same serial transfer.
S
Slave Address
From Master to Slave
From Slave to Master

PIN DESCRIPTION

Table 101: I2C Pin Description
Pin Name
Type
Input/
SDA
Output
Input/
SCL
Output
I2C Interface
W
A
"0" - Write
"1" - Read
Figure 29: Format of slave receiver mode
2
C hardware looks for its own slave address and the general call address. If one of these
R
A
"0" - Write
"1" - Read
Figure 30: Format of slave transmitter mode
2
Serial Data. I
C data input and output. The associated port pin has an open drain output in
2
order to conform to I
C specifications.
2
Serial Clock. I
C clock input and output. The associated port pin has an open drain output in
2
order to conform to I
C specifications.
DATA
DATA
A
Data Transferred
(n Bytes + Acknowledge)
A = Acknowledge (SDA low)
A = Not Acknowledge (SDA high)
S = START condition
P = STOP Condition
RS = Repeated START Condition
DATA
A
DATA
Data Transferred
(n Bytes + Acknowledge)
A = Acknowledge (SDA low)
A = Not Acknowledge (SDA high)
S = START condition
P = STOP Condition
Description
140
Preliminary User Manual
LPC2119/2129/2292/2294
P/RS
A/A
2
C may operate as a master and
A
P
January 08, 2004

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