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I/O bus and
the
DDC
bus.
All transfers are
under subchannel
control;
however,
a
transfer
may
be
initiated
by
a
command
from
the
program
to
the
peripheral device over
the
I/O
bus.
The
address
of the
memory
location
to
be transferred
as
well as
the
direction
and time
of
transfer are
under subchannel
control.
This option gives
the
HI
12
a direct
memory
transfer
capability.
GENERAL
INTERFACE CHARACTERISTICS
The
input/output characteristics
of the
HI
12
have been
carefully tailored
to
provide
maximum
interface
flexibility,
with
the
widest possible
interface tolerances.
l/O
signals
are true
in the
ground
states
and
relatively
immune
to
noise.
Timing requirements
give
adequate time
for a
device
to
respond; and
wide
strobe pulses eliminate capacitive losses.
All
l/O
instructions
have
the
same
length,
making
timing consistent
for
programmed
l/O
transfers.
Also, included as part
of the
standard
instruction
complement,
is
the
stall
instruction for
convenient synchronization
(with
very low
latency time)
to
external devices.
1-2
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