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When
interrupts are
enabled
in the
controller
and
a
device
interrupts,
the
program
does
not
execute
the
next sequential
instruction.
Instead, the
program
takes
the
next corn-
command
from
dedicated
location
00002 and
the
controller
inhibits
further interrupts.
Then,
because
there
is
only
one
interrupt
line,
the
program must
determine which
device
caused
the interrupt.
Since
the
controller locates
an
interrupt
by
performing
a
series
of
SKS-JMP com-
mands, each
device
must
have
a
mechanized SKS
(skip
if
device not
interrupting) instruction.
The
SKS
is
designed
to
skip the
JMP
command
if
the
device polled
is
not interrupting.
This
polling
continues
until the
SKS
detects the interrupting device.
At
this
time,
the
JMP
com-
mand
is
executed, transferring control
to
a
subroutine
which
services
the device.
Servicing an interrupting device involves several events.
First, the data
transfer or
action called for by
the
device
must
take place.
Secondly,
the interrupting flip-flop
in
the
device
must
be reset.
This
may
be
done
by
the
data transfer
command
(OTA
or
INA)
or by
implementing
a
reset
command
(i.
e.
,
an
OCP).
In this
type
of
system,
the
order
of
SKS
commands
determines
the
priority
assigned
to
simultaneous
interrupts
because
the first
interrupting device receiving
an
SKS
is
serviced.
The requirements
of
some
systems permit
disabling
of all
other interrupts while servicing
the first
recognized
interrupt.
Other systems, however, have
interrupts requiring
immediate
recognition and service
when
they occur.
These systems need
the ability to
enable priority
interrupts
in a
selective fashion.
This feature allows urgent interrupts
to
be
recognized
during
a
long
service
routine
of a
less
urgent
interrupt.
The H112
can
accommodate
either
system
type with
its
multiple
level
interrupt
capa-
bility.
To make
the
multiple
level priority
scheme,
the
Hi
12
uses
a
mask
bit in
each
external device.
In
a
particular device,
the
mask
bit
(mask
flip-flop)
is
gated with
the
interrupt
flip-flop;
and
the
interrupt
line
is
grounded
(activated)
only
when
both
flip-flops
are
set.
This case
represents an
interrupt
from
a
device
in
MASK ON
condition.
If
the
mask
bit is
reset and
the
interrupt
flip-flop
is set,
the
interrupt
line
is
not
grounded and
the
SKS
(skip
if
not
interrupting) will skip.
Thus
the state of the
interrupt
flip-flop
has no
effect.
The
following truth table
represents
the conditions available
with interrupt
and
mask
flip-flop gating:
(see
Figure
2-17).
Interrupt
Flip-
Flop
Mask
Flip-
Flop
Interrupt
Line
SKS
Command
1
1
1
1
Not Active
(+6V)
Not Active
(+6V)
Not Active
(+6V)
ACTIVE
(Gnd)
Skip
Skip
Skip
Not Skip
2-1!
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