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CS-520
RECEIVER
PAC,
MODEL
CS-520
The Receiver
PAC,
Model CS-520
(Figure CS-520-1).
is
a
line
receiver with
6
gated
outputs
used
to
receive
signals
from
the
I/O bus on
pins
4, 6,
14, 16,
26
and
28.
The
circuit
has
a
built-in
terminator
for
each
signal.
Pins
9
and
23 provide points for strobe
signals.
SPECIFICATIONS
Input
Loading
1
unit
load
on each
input
pin.
Output Drive Capacity
7
unit
loads on pins
5,
1,
15, 11,
25,
and
19.
8 unit
loads on pins
7,
3,
17, 13,
27,
and
21.
Circuit
Delay
75 ns
(at
1.
5V
average over two
stages)
Current Requirements
+6V: 75
mA
(max)
Electrical Parts List
Ref.
Desig.
Description
CCD
Part No.
CI
CRIA-CRIF
RIA-RIF
M4,M5,M6
CAPACITOR,
FIXED,
ELECTROLYTIC:
DIODE,
SI
RESISTOR, FIXED, FILM:
6.8K
±2%,
1/4W
MICROCIRCUIT:
946 Type,
quad
NAND
gate,
integrated
circuit
70 930 230
Oil
70 943 083
001
70 932 114 069
70 950 105 002
CS-520-1
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