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The following illustration helps you to locate the memory slots on the system board.
Figure 83. DIMM locations
The following table shows the relationship between the processors, memory controllers, memory channels,
slots, and DIMM numbers. The system has eight channels, and supports up to two DIMMs per channel.
DIMMs must be populated from farthest slot (slot 1) to closest slot (slot 0) to the processor on a per-channel
basis when a data bus daisy chain topology is used. DIMMs may be populated in either slot on a per-channel
basis when a data bus balanced tee route topology is used.
Table 15. DIMM installation order
Unified
Memory
UMC2
Controller
(UMC)
Channel
D
(CH)
1
0
CH slot
DIMM
1
2
number
1 DIMM
1
2 DIMMs
1
3 DIMMs
1
4 DIMMs
1
5 DIMMs
1
6 DIMMs
1
7 DIMMs
ThinkSystem SR635 Maintenance Manual
108
UMC3
UMC1
C
B
1
0
1
0
3
4
5
6
3
3
3
3
3
3
5
3
5
UMC0
UMC6
A
E
1
0
0
1
7
8
9
10
7
7
7
10
UMC7
UMC5
F
G
0
1
0
1
11
12
13
14
14
14
14
14
14
UMC4
H
0
1
15
16
16
16
16
16
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