Features - Motorola IXP-9120 Reference Manual

Introduction

Features

IXP/CPCI-9120 is a 6U 4HP CompactPCI Single Board Computer complex based on the Intel
IXP2400 network processor for up to duplex OC-48 or 4 Gbit Ethernet bandwidth applica-
tions. IXP/CPCI-9120 has a Processor PMC expansion for expandable Control plane process-
ing power, a flexible media interface mezzanine to support different standard and OEM media
flavors (e.g., Copper Ethernet, Fiber Ethernet, SONET/ATM, DS1/E1, etc.), and a SRAM
expansion mezzanine site for memory expansion or co-processing support.
The IXP/CPCI-9120 complies with the following industry standard specifications:
• PICMG 2.0 R3.0 (CompactPCI Core Specifications)
• PICMG 2.1 R2.0 (Hot Swap Specification)
• PICMG 2.16 R1.0 (Packet Switching Backplane Specification)
• PICMG 2.9 R1.0 (System Management Specification)
• VITA 32 (Processor PMC)
IBMU
SO-DIMM
DD
R
(Up to 512 MB)
QDR II SSRAM
Ch 0
(Up to 16 MB)
LA-1 Mezzanine
SITE
Ch 1
LA1-920/8M
PrPMC SITE
Figure 1: Single Slot Complex Functional Block Diagram change to Single NPU
IXP/CPCI-9120
BOOT ROM
USER FLASH
Flash
Demultiplexed SlowPort bus
GP
EPLD
SlowPort
Slow Port
IXP2400
MSF
PCI
By Chandan
PCI
82546GB
EPLD
RGMII
RGMII
IXF1104
SPI-3
QUAD MAC
RGMII
RGMII
MDI
MUX
MDI
To PICMG2.16 Links
Features
MSF MEZZANINE SITE
IO-920/4GBE-T/P
LED
EPLD
88E1145
QUAD PHY
Ununused
DMUX
ports
33